双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74ALVC573BQ

Octal D-type transparent latch; 3-state

The 74ALVC573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 3.6 V

  • CMOS low power dissipation

  • Overvoltage tolerant inputs to 3.6 V

  • Direct interface with TTL levels

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA per JESD78 Class II.A

  • Complies with JEDEC standards:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Package name
74ALVC573BQ 1.65 - 3.6 LVTTL ± 24 2.2 low -40~85 DHVQFN20

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74ALVC573BQ 74ALVC573BQ,115
(935273687115)		 Active ALVC573 SOT764-1
DHVQFN20
(SOT764-1) 		SOT764-1 SOT764-1_115

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74ALVC573BQ 74ALVC573BQ,115 74ALVC573BQ rohs rhf rhf
品质及可靠性免责声明

Series

文档 (8)

文件名称 标题 类型 日期
74ALVC573 Octal D-type transparent latch; 3-state Data sheet 2023-07-11
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03
alvc573 alvc573 IBIS model IBIS model 2013-04-08
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN20_SOT764-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 2.5 mm x 4.5 mm x 0.85 mm body Marcom graphics 2017-01-28
SOT764-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body Package information 2022-06-21
SOT764-1_115 DHVQFN20; Reel pack for SMD, 7''; Q1/T1 product orientation Packing information 2020-04-21
74ALVC573BQ_Nexperia_Product_Reliability 74ALVC573BQ Nexperia Product Reliability Quality document 2024-06-16

支持

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模型

文件名称 标题 类型 日期
alvc573 alvc573 IBIS model IBIS model 2013-04-08
SOT764-1 3D model for products with SOT764-1 package Design support 2019-10-03

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74ALVC573BQ 74ALVC573BQ,115 935273687115 Active SOT764-1_115 3,000 订单产品

样品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74ALVC573BQ 74ALVC573BQ,115 935273687115 SOT764-1 订单产品