双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AUP1G04GV

Low-power inverter

The 74AUP1G04 is a single inverter.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • CMOS low power dissipation

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • Multiple package options

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AUP1G04GV 0.8 - 3.6 CMOS ± 1.9 70 1 ultra low -40~125 TSOP5

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AUP1G04GV 74AUP1G04GV,125
(935290676125)
Active p04 SOT753
TSOP5
(SOT753)
SOT753 REFLOW_BG-BD-1
WAVE_BG-BD-1
SOT753_125

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AUP1G04GV 74AUP1G04GV,125 74AUP1G04GV rohs rhf rhf
品质及可靠性免责声明

文档 (13)

文件名称 标题 类型 日期
74AUP1G04 Low-power inverter Data sheet 2024-08-30
AN11052 Pin FMEA for AUP family Application note 2019-01-09
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT753 3D model for products with SOT753 package Design support 2019-01-22
aup1g04 74AUP1G04 IBIS model IBIS model 2018-05-25
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT753 plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body Package information 2022-05-31
SOT753_125 TSOP5; Reel pack for SMD, 7"; Q3/T4 product orientation Packing information 2020-04-21
74AUP1G04GV_Nexperia_Product_Reliability 74AUP1G04GV Nexperia Product Reliability Quality document 2024-06-16
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
MAR_SOT753 MAR_SOT753 Topmark Top marking 2013-06-03
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

支持

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模型

文件名称 标题 类型 日期
aup1g04 74AUP1G04 IBIS model IBIS model 2018-05-25
SOT753 3D model for products with SOT753 package Design support 2019-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74AUP1G04GV 74AUP1G04GV,125 935290676125 Active SOT753_125 3,000 订单产品

样品

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如果您没有 Nexperia 的直接账户,我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方经销商列表

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74AUP1G04GV 74AUP1G04GV,125 935290676125 SOT753 订单产品