可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
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74HC107PW-Q100 | 74HC107PW-Q100J | 935302253118 | SOT402-1 | 订单产品 |
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Click here for more informationDual JK flip-flop with reset; negative-edge trigger
The 74HC107-Q100; 74HCT107-Q100 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
Input levels:
For 74HC107-Q100: CMOS level
For 74HCT107-Q100: TTL level
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
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74HC107PW-Q100 | 2.0 - 6.0 | CMOS | ± 5.2 | 16 | 78 | low | -40~125 | TSSOP14 |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
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74HC107PW-Q100 | 74HC107PW-Q100J (935302253118) |
Active | HC107 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
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SOT402-1_118 |
文件名称 | 标题 | 类型 | 日期 |
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74HC_HCT107_Q100 | Dual JK flip-flop with reset; negative-edge trigger | Data sheet | 2024-02-20 |
AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
SOT402-1_118 | TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74HC107PW-Q100_Nexperia_Product_Reliability | 74HC107PW-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
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文件名称 | 标题 | 类型 | 日期 |
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SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
Model Name | 描述 |
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型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
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74HC107PW-Q100 | 74HC107PW-Q100J | 935302253118 | Active | SOT402-1_118 | 2,500 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.