可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74HC373BQ-Q100 | 74HC373BQ-Q100,115 | 935299034115 | SOT764-1 | 订单产品 |
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Click here for more information74HC373BQ-Q100
Octal D-type transparent latch; 3-state
The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V)
- JESD7A (2.0 V to 6.0 V)
Input levels:
For 74HC373-Q100: CMOS level
For 74HCT373-Q100: TTL level
3-state non-inverting outputs for bus-oriented applications
Common 3-state output enable input
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of solder joints
参数类型
| 型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74HC373BQ-Q100 | 2.0 - 6.0 | CMOS | ± 7.8 | 12 | 8 | low | -40~125 | DHVQFN20 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74HC373BQ-Q100 | 74HC373BQ-Q100,115 (935299034115) |
Active | HC373BQ |
DHVQFN20 (SOT764-1) |
SOT764-1 | SOT764-1_115 |
Series
文档 (10)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74HC_HCT373_Q100 | Octal D-type transparent latch; 3-state | Data sheet | 2024-08-05 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| SOT764-1 | 3D model for products with SOT764-1 package | Design support | 2019-10-03 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN20_SOT764-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 2.5 mm x 4.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT764-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 20 terminals; 0.5 mm pitch; 4.5 mm x 2.5 mm x 1 mm body | Package information | 2022-06-21 |
| SOT764-1_115 | DHVQFN20; Reel pack for SMD, 7''; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74HC373BQ-Q100_Nexperia_Product_Reliability | 74HC373BQ-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
| hc | HC/HCT Spice model | SPICE model | 2022-02-17 |
| HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74HC373BQ-Q100 | 74HC373BQ-Q100,115 | 935299034115 | Active | SOT764-1_115 | 3,000 | 订单产品 |
样品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74HC373BQ-Q100
Octal D-type transparent latch; 3-state
从安世半导体购买
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