双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC2G125DP

Dual bus buffer/line driver; 3-state

The 74LVC2G125 is a dual buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Alternatives

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V

  • High noise immunity

  • IOFF circuitry provides partial Power-down mode operation

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low-power consumption

  • Latch-up performance exceeds 250 mA

  • Direct interface with TTL levels

  • Overvoltage tolerant inputs to 5.5 V

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74LVC2G125DP 1.65 - 5.5 CMOS/LVTTL ± 32 175 2 low -40~125 TSSOP8

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVC2G125DP 74LVC2G125DP,125
(935272175125)		 Active V25 SOT505-2
TSSOP8
(SOT505-2) 		SOT505-2 SOT505-2_125

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVC2G125DP 74LVC2G125DP,125 74LVC2G125DP rohs rhf rhf
品质及可靠性免责声明

Series

文档 (11)

文件名称 标题 类型 日期
74LVC2G125 Dual bus buffer/line driver; 3-state Data sheet 2024-08-12
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11009 Pin FMEA for LVC family Application note 2019-01-09
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT505-2 3D model for products with SOT505-2 package Design support 2019-01-18
lvc2g125 74LVC2G125 IBIS model IBIS model 2014-10-20
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT505-2 plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body Package information 2022-06-03
SOT505-2_125 TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation Packing information 2020-04-21
74LVC2G125DP_Nexperia_Product_Reliability 74LVC2G125DP Nexperia Product Reliability Quality document 2024-06-16
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10

支持

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模型

文件名称 标题 类型 日期
lvc2g125 74LVC2G125 IBIS model IBIS model 2014-10-20
SOT505-2 3D model for products with SOT505-2 package Design support 2019-01-18

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74LVC2G125DP 74LVC2G125DP,125 935272175125 Active SOT505-2_125 3,000 订单产品

样品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LVC2G125DP 74LVC2G125DP,125 935272175125 SOT505-2 订单产品