双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC74ADB

Dual D-type flip-flop with set and reset; positive-edge trigger

The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

此产品已停产

Features and benefits

  • 5 V tolerant inputs for interlacing with 5 V logic

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low power consumption

  • Direct interface with TTL levels

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 Package name
74LVC74ADB SSOP14

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

下表中的所有产品型号均已停产 。

型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVC74ADB 74LVC74ADB,118
(935260735118)
Withdrawn / End-of-life LVC74A SOT337-1
SSOP14
(SOT337-1)
SOT337-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
SOT337-1_118
74LVC74ADB,112
(935260735112)
Obsolete LVC74A 暂无信息

环境信息

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVC74ADB 74LVC74ADB,118 74LVC74ADB rohs rhf rhf
74LVC74ADB 74LVC74ADB,112 74LVC74ADB rohs rhf rhf
品质及可靠性免责声明

文档 (10)

文件名称 标题 类型 日期
74LVC74A Dual D-type flip-flop with set and reset; positive-edge trigger Data sheet 2024-02-22
AN11009 Pin FMEA for LVC family Application note 2019-01-09
AN263 Power considerations when using CMOS and BiCMOS logic devices Application note 2023-02-07
lvc74a lvc74a IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SSOP14_SOT337-1_mk plastic, shrink small outline package; 14 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Marcom graphics 2017-01-28
SOT337-1 plastic, shrink small outline package; 14 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body Package information 2020-04-21
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
lvc lvc Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名称 标题 类型 日期
lvc74a lvc74a IBIS model IBIS model 2013-04-09
lvc lvc Spice model SPICE model 2013-05-07

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.