双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC2G16

Dual buffer gate

The 74LVC2G16 is a dual buffer. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 1.65 V to 5.5 V

  • Overvoltage tolerant inputs to 5.5 V

  • High noise immunity

  • ±24 mA output drive (VCC = 3.0 V)

  • CMOS low power dissipation

  • IOFF provides partial Power-down mode operation

  • Direct interface with TTL levels

  • Latch-up performance exceeds 250 mA

  • Complies with JEDEC standard:

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Rth(j-c) (K/W)Package name
74LVC2G16GMProduction1.65 - 5.5CMOS/LVTTL± 321752low-40~125290145XSON6
74LVC2G16GWProduction1.65 - 5.5CMOS/LVTTL± 321752low-40~125264153TSSOP6

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC2G16GM
XSON6
(SOT886) 		SOT886REFLOW_BG-BD-1
SOT886_125ActiveYU74LVC2G16GMH
( 9353 075 98125 )
74LVC2G16GW
TSSOP6
(SOT363-2) 		SOT363-2SOT363-2_125ActiveYU74LVC2G16GWH
( 9353 076 02125 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC2G16GM74LVC2G16GMH74LVC2G16GMAlways Pb-free
74LVC2G16GW74LVC2G16GWH74LVC2G16GWAlways Pb-free
品质及可靠性免责声明

文档 (7)

文件名称标题类型日期
74LVC2G16Dual buffer gateData sheet2023-08-18
lvc2g1674LVC2G16 IBIS modelIBIS model2015-11-01
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT363-2plastic thin shrink small outline package; 6 leads; body width 1.25 mmPackage information2022-11-21
MAR_SOT886MAR_SOT886 TopmarkTop marking2013-06-03
SOT886plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm bodyPackage information2022-06-01
REFLOW_BG-BD-1Reflow soldering profileReflow soldering2021-04-06

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模型

文件名称标题类型日期
lvc2g1674LVC2G16 IBIS modelIBIS model2015-11-01

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