双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AVC2T245

2-bit dual supply translating transceiver with configurable voltage translation; 3-state

The 74AVC2T245 is a 2-bit, dual supply transceiver that enables bidirectional level translation. The device can be used as two 1-bit transceivers or as a 2-bit transceiver. It features two 2-bit input-output ports (An and Bn) and direction control inputs (DIRn), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIRn are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIRn allows transmission from An to Bn and a LOW on DIRn allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state.

特性

  • Wide supply voltage range:

    • VCC(A): 0.8 V to 3.6 V

    • VCC(B): 0.8 V to 3.6 V

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • Maximum data rates:

    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

    • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameCategory
74AVC2T245GUProduction0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.12very low-40~12522613.9127XQFN10Bi-directional | Direction controlled

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AVC2T245GU
XQFN10
(SOT1160-1) 		SOT1160-1SOT1160-1_115ActiveB374AVC2T245GUX
( 9353 089 72115 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AVC2T245GU74AVC2T245GUX74AVC2T245GUweek 25, 2019
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74AVC2T2452-bit dual supply translating transceiver with configurable voltage translation; 3-stateData sheet2024-07-02
AN90007Pin FMEA for AVC familyApplication note2018-11-30
Nexperia_document_guide_Logic_translatorsNexperia Logic TranslatorsBrochure2021-04-12
avc2t245avc2t245 IBIS modelIBIS model2017-06-02
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT1160-1plastic, leadless extremely thin quad flat package; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm bodyPackage information2022-06-07

支持

如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
avc2t245avc2t245 IBIS modelIBIS model2017-06-02

订购、定价与供货

样品

作为 Nexperia 的客户，您可以通过我们的销售机构订购样品。

如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方 经销商列表。