双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AVC16T245-Q100

16-bit dual supply translating transceiver with configurable voltage translation; 3-state

The 74AVC16T245-Q100 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and nBn). Each port has its own output enable (nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied with any voltage between 0.8 V and 3.6 V. This flexibility makes the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 0.8 V to 3.6 V

    • VCC(B): 0.8 V to 3.6 V

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • Maximum data rates:

    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

    • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

    • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Inputs accept voltages up to 3.6 V

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74AVC16T245DGV-Q100Production0.8 - 3.60.8 - 3.6CMOS/LVTTL± 122.116very low-40~1251111.031TVSOP48

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74AVC16T245DGV-Q100
TVSOP48
(SOT480-1) 		SOT480-1SOT480-1_118ActiveAVC16T24574AVC16T245DGV-Q1J
( 9353 028 47118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74AVC16T245DGV-Q10074AVC16T245DGV-Q1J74AVC16T245DGV-Q100Always Pb-free
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74AVC16T245_Q10016-bit dual supply translating transceiver with configurable voltage translation; 3-stateData sheet2024-06-25
AN90007Pin FMEA for AVC familyApplication note2018-11-30
avc16t245AVC16T245 IBIS modelIBIS model2013-05-05
Nexperia_document_leaflet_Logic_TVSOP48_16bitPortfolio_201903Smaller-footprint 16-bit logic with advanced featuresLeaflet2019-03-29
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT480-1plastic, thin shrink small outline package; 48 leads; 0.4 mm pitch; 9.7 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-22

支持

如果您需要设计/技术支持，请告知我们并填写 应答表, 我们会尽快回复您。

模型

文件名称标题类型日期
avc16t245AVC16T245 IBIS modelIBIS model2013-05-05

订购、定价与供货

样品

作为 Nexperia 的客户，您可以通过我们的销售机构订购样品。

如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方 经销商列表。