74AUP2G240GN
|
Low-power dual inverting buffer/line driver; 3-state |
|
74AUP2G32GN
|
Low-power dual 2-input OR gate |
|
74AUP2G126GN
|
Low-power dual buffer/line driver; 3-state |
|
74AUP2G00GN
|
Low-power dual 2-input NAND gate |
|
74AUP1G74GN
|
Low-power D-type flip-flop with set and reset; positive-edge trigger |
|
74AUP3G0434GN
|
Low-power dual inverter and single buffer |
|
74AVC2T45GN
|
Dual-bit, dual-supply voltage level translator/transceiver; 3-state |
|
74AUP2G08GN
|
Low-power dual 2-input AND gate |
|
74AUP2G132GN
|
Low-power dual 2-input NAND Schmitt trigger |
|
74AUP2G241GN
|
Low-power dual buffer/line driver; 3-state |
|
74AUP3G04GN
|
Low-power triple inverter |
|
74AUP2G02GN
|
Low-power dual 2-input NOR gate |
|
74AUP2G80GN
|
Low-power dual D-type flip-flop; positive-edge trigger |
|
74AUP2G157GN
|
Low-power 2-input multiplexer |
|
74LVC2G53GN
|
2-channel analog multiplexer/demultiplexer |
|
74LVC2G32GN
|
Dual 2-input OR gate |
|
74LVC3G17GN
|
Triple non-inverting Schmitt trigger with 5 V tolerant input |
|
74AUP2G125GN
|
Low-power dual buffer/line driver; 3-state |
|
74AUP2G79GN
|
Low-power dual D-type flip-flop; positive-edge trigger |
|
74LVC3G07GN
|
Triple buffer with open-drain output |
|
74AUP2G38GN
|
Low-power dual 2-input NAND gate; open drain |
|
74LVC1G53GN
|
2-channel analog multiplexer/demultiplexer |
|
74LVCH2T45GN
|
Dual supply translating transceiver; 3-state |
|
74AUP3G34GN
|
Low-power triple buffer |
|
74AUP1G885GN
|
Low-power dual function gate |
|
74AUP3G3404GN
|
Low-power dual buffer and single inverter |
|
74AUP3G14GN
|
Low-power triple Schmitt trigger inverter |
|
74LVC2G126GN
|
Dual bus buffer/line driver; 3-state |
|
74LVC3G14GN
|
Triple inverting Schmitt trigger with 5 V tolerant input |
|
74AUP3G17GN
|
Low-power triple Schmitt trigger |
|
74AVCH2T45GN
|
Dual-bit, dual-supply voltage level translator/transceiver; 3-state |
|
74LVC3G34GN
|
Triple buffer |
|
74AUP3G07GN
|
Low-power triple buffer with open-drain output |
|
74LVC2G241GN
|
Dual buffer/line driver; 3-state |
|
74LVC2G08GN
|
Dual 2-input AND gate |
|
74AUP2G86GN
|
Low-power dual 2-input EXCLUSIVE-OR gate |
|
74LVC1G74GN
|
Single D-type flip-flop with set and reset; positive edge trigger |
|
74LVC2G74GN
|
Single D-type flip-flop with set and reset; positive edge trigger |
|
74LVC1G123GN
|
Single retriggerable monostable multivibrator; Schmitt trigger inputs |
|
74LVC1G99GN
|
Ultra-configurable multiple function gate; 3-state |
|
74LVC2G66GN
|
Bilateral switch |
|
74LVC2T45GN
|
Dual supply translating transceiver; 3-state |
|
74LVC2G125GN
|
Dual bus buffer/line driver; 3-state |
|
74LVC3GU04GN
|
Triple unbuffered inverter |
|
74LVC2G38GN
|
Dual 2-input NAND gate; open drain |
|
74LVC2G00GN
|
Dual 2-input NAND gate |
|
74LVC3G06GN
|
Triple inverter with open-drain output |
|
74LVC3G04GN
|
Triple inverter |
|
74LVC2G02GN
|
Dual 2-input NOR gate |
|
74LVC2G86GN
|
Dual 2-input EXCLUSIVE-OR gate |
|
74LVC2G240GN
|
Dual inverting buffer/line driver; 3-state |
|