双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVT162373

3.3 V 16-bit transparent D-type latch with 30 Ohm termination resistors; 3-state

The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.

This device is a 16-bit transparent D-type latch with non-inverting 3-state bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When latch enable (LE) input is HIGH, the Q outputs follow the date (D) inputs. When latch enable is taken LOW, the Q outputs are latched at the levels of the D inputs one setup time prior to the HIGH-to-LOW transition.

The 74LVT162373 is designed with 30 Ω series resistance in both the HIGH-state and LOW-state of the output. This design reduces the noise in applications such as memory address drivers, clock drivers and bus receivers and transmitters.

Features and benefits

  • 16-bit transparent latch

  • 3-state buffers

  • Output capability: +12 mA/–12 mA

  • TTL input and output switching levels

  • Input and output interface capability to systems at 5 V supply

  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

  • Live insertion/extraction permitted

  • Outputs include series resistance of 30 Ω making external termination resistors unnecessary

  • Power-up reset

  • Power-up 3-state

  • No bus current loading when output is tied to 5 V bus

  • Latch-up protection:

    • JESD78B Class II exceeds 500 mA

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Package name
74LVT162373DGG 2.7 - 3.6 TTL ± 12 2.5 medium -40~85 TSSOP48

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVT162373DGG 74LVT162373DGG,118
(935264164118)		 Active LVT162373 SOT362-1
TSSOP48
(SOT362-1) 		SOT362-1 SSOP-TSSOP-VSO-WAVE
SOT362-1_118

下表中的所有产品型号均已停产 。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVT162373DL 74LVT162373DL,112
(935264163112)		 Obsolete LVT162373 Standard Procedure Standard Procedure SOT370-1
SSOP48
(SOT370-1) 		SOT370-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
暂无信息
74LVT162373DL,118
(935264163118)		 Obsolete LVT162373 Standard Procedure Standard Procedure SOT370-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVT162373DGG 74LVT162373DGG,118 74LVT162373DGG rohs rhf rhf

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVT162373DL 74LVT162373DL,112 74LVT162373DL rohs rhf rhf
74LVT162373DL 74LVT162373DL,118 74LVT162373DL rohs rhf rhf
品质及可靠性免责声明

文档 (11)

文件名称 标题 类型 日期
74LVT162373 3.3 V 16-bit transparent D-type latch with 30 Ω termination resistors; 3-state Data sheet 2024-07-08
sa00046 Block diagram: 74ABT16373BDGG, 74ABT16373BDL, 74ALVT16373DGG, 74ALVT16373DL, 74LVT162373DGG, 74LVT162373DL, 74LVT16373ADGG, 74LVT16373ADL Block diagram 2009-11-03
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22
lvt162373 lvt162373 IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP48_SOT362-1_mk plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body Marcom graphics 2017-01-28
SOT362-1 plastic thin shrink small outline package; 48 leads; body width 6.1 mm Package information 2024-01-05
SOT370-1 plastic, shrink small outline package; 48 leads; 0.635 mm pitch; 15.9 mm x 7.5 mm x 2.8 mm body Package information 2020-04-21
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22
lvt162373 lvt162373 IBIS model IBIS model 2013-04-09

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