双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVT573DB

3.3 V octal D-type transparent latch; 3-state

The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

此产品已停产

Features and benefits

  • Wide supply voltage range from 2.7 to 3.6 V

  • Inputs and outputs arranged for easy interfacing to microprocessors

  • 3-state outputs for bus interfacing

  • Common output enable control

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Direct interface with TTL levels

  • Input and output interface capability to systems at 5 V supply

  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

  • Live insertion and extraction permitted

  • No bus current loading when output is tied to 5 V bus

  • Power-up reset

  • Power-up 3-state

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C

参数类型

型号 Package name
74LVT573DB SSOP20

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

下表中的所有产品型号均已停产 。

型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVT573DB 74LVT573DB,118
(935170710118)
Withdrawn / End-of-life LVT573 SOT339-1
SSOP20
(SOT339-1)
SOT339-1 SSOP-TSSOP-VSO-WAVE
SOT339-1_118
74LVT573DB,112
(935170710112)
Obsolete LVT573 暂无信息

环境信息

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVT573DB 74LVT573DB,118 74LVT573DB rohs rhf rhf
74LVT573DB 74LVT573DB,112 74LVT573DB rohs rhf rhf
品质及可靠性免责声明

文档 (6)

文件名称 标题 类型 日期
74LVT573 3.3 V octal D-type transparent latch; 3-state Data sheet 2024-06-07
lvt573 lvt573 IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT339-1 plastic, shrink small outline package; 20 leads; 0.65 mm pitch; 7.2 mm x 5.3 mm x 2 mm body Package information 2020-04-21
lvt lvt Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名称 标题 类型 日期
lvt573 lvt573 IBIS model IBIS model 2013-04-09
lvt lvt Spice model SPICE model 2013-05-07

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.