可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
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74LV165APW | 74LV165APW,118 | 935273177118 | SOT403-1 | 订单产品 |
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Click here for more information8-bit parallel-in/serial-out shift register
The 74LV165A is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel-load input (PL) is LOW, parallel data from the inputs D0 to D7 are loaded into the register asynchronously. When input PL is HIGH, data enters the register serially at the input DS. It shifts one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the output Q7 to the input DS of the succeeding stage.
The clock input is a gate-OR structure which allows one input to be used as an active LOW clock enable input (CE) input. The pin assignment for the inputs CP and CE is arbitrary and can be reversed for layout convenience. The LOW-to-HIGH transition of the input CE should only take place while CP HIGH for predictable operation.
Schmitt-trigger action at all inputs, makes the circuit tolerant for slower input rise and fall times. It is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging current backflow through the device when it is powered down.
Wide supply voltage range from 2.0 V to 5.5 V
Synchronous parallel-to-serial applications
Synchronous serial input for easy expansion
Latch-up performance exceeds 250 mA
CMOS LOW power consumption
5.5 V tolerant inputs/outputs
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Complies with JEDEC standards:
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
JESD8-1A (4.5 V to 5.5 V)
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
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74LV165APW | 1.0 - 5.5 | TTL | ± 12 | 7.5 | 115 | 8 | low | -40~85 | TSSOP16 |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
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74LV165APW | 74LV165APW,118 (935273177118) |
Active | LV165A |
![]() TSSOP16 (SOT403-1) |
SOT403-1 |
SSOP-TSSOP-VSO-WAVE
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SOT403-1_118 |
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LV165A | 8-bit parallel-in/serial-out shift register | Data sheet | 2024-04-18 |
SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP16_SOT403-1_mk | plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
SOT403-1 | plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-08 |
SOT403-1_118 | TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74LV165APW_Nexperia_Product_Reliability | 74LV165APW Nexperia Product Reliability | Quality document | 2024-06-16 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
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文件名称 | 标题 | 类型 | 日期 |
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SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
Model Name | 描述 |
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型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
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74LV165APW | 74LV165APW,118 | 935273177118 | Active | SOT403-1_118 | 2,500 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.