可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
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74LVC1G99DP | 74LVC1G99DP,125 | 935284435125 | SOT505-2 | 订单产品 |
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Click here for more informationUltra-configurable multiple function gate; 3-state
The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including, AND, OR, NAND, NOR, XOR, XNOR, inverter, buffer and MUX. No external components are required to configure the device as all inputs can be connected directly to VCC or GND. The 3-state output is controlled by the output enable input (OE). A HIGH level at OE causes the output (Y) to assume a high-impedance OFF-state. When OE is LOW, the output state is determined by the signals applied to the Schmitt trigger inputs (A, B, C and D).
Due to the use of Schmitt trigger inputs the device is tolerant of slowly changing input signals, transforming them into sharply defined, jitter free output signals. By eliminating leakage current paths to VCC and GND, the inputs and disabled output are also over-voltage tolerant, making the device suitable for mixed-voltage applications.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
The 74LVC1G99 is fully specified over the supply range from 1.65 V to 5.5 V.
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
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74LVC1G99DP | 1.65 - 5.5 | TTL | ± 32 | 8.4 | 150 | 1 | low | -40~125 | TSSOP8 |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
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74LVC1G99DP | 74LVC1G99DP,125 (935284435125) |
Active | V99 |
![]() TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LVC1G99 | Ultra-configurable multiple function gate; 3-state | Data sheet | 2024-08-12 |
AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
lvc1g99 | 74LVC1G99 IBIS model | IBIS model | 2014-10-20 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
SOT505-2_125 | TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2020-04-21 |
74LVC1G99DP_Nexperia_Product_Reliability | 74LVC1G99DP Nexperia Product Reliability | Quality document | 2024-06-16 |
型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
---|---|---|---|---|---|---|
74LVC1G99DP | 74LVC1G99DP,125 | 935284435125 | Active | SOT505-2_125 | 3,000 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.