双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AUP1G04-Q100

Low-power inverter

The 74AUP1G04-Q100 is a single inverter.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 0.8 V to 3.6 V

  • CMOS low power dissipation

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AUP1G04GV-Q100 0.8 - 3.6 CMOS ± 1.9 70 1 ultra low -40~125 TSOP5
74AUP1G04GW-Q100 0.8 - 3.6 CMOS ± 1.9 70 1 ultra low -40~125 TSSOP5

封装

型号 可订购的器件编号,(订购码(12NC)) 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AUP1G04GV-Q100 74AUP1G04GV-Q100H
(935303013125)
Active p04 SOT753
TSOP5
(SOT753)
SOT753 REFLOW_BG-BD-1
WAVE_BG-BD-1
SOT753_125
74AUP1G04GW-Q100 74AUP1G04GW-Q100H
(935303014125)
Active pC SOT353-1
TSSOP5
(SOT353-1)
SOT353-1 WAVE_BG-BD-1
SOT353-1_125

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AUP1G04GV-Q100 74AUP1G04GV-Q100H 74AUP1G04GV-Q100 rohs rhf rhf
74AUP1G04GW-Q100 74AUP1G04GW-Q100H 74AUP1G04GW-Q100 rohs rhf rhf
品质及可靠性免责声明

文档 (15)

文件名称 标题 类型 日期
74AUP1G04_Q100 Low-power inverter Data sheet 2023-07-11
AN10161 PicoGate Logic footprints Application note 2002-10-29
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
SOT753 3D model for products with SOT753 package Design support 2019-01-22
SOT353-1 3D model for products with SOT353-1 package Design support 2019-09-23
aup1g04 74AUP1G04 IBIS model IBIS model 2018-05-25
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP5_SOT353-1_mk plastic, thin shrink small outline package; 5 leads; 0.65 mm pitch; 2 mm x 1.25 mm x 0.95 mm body Marcom graphics 2018-07-25
SOT753 plastic, surface-mounted package; 5 leads; 0.95 mm pitch; 2.9 mm x 1.5 mm x 1 mm body Package information 2022-05-31
SOT353-1 plastic thin shrink small outline package; 5 leads; body width 1.25 mm Package information 2022-11-15
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT753 MAR_SOT753 Topmark Top marking 2013-06-03
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

支持

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模型

文件名称 标题 类型 日期
SOT753 3D model for products with SOT753 package Design support 2019-01-22
SOT353-1 3D model for products with SOT353-1 package Design support 2019-09-23
aup1g04 74AUP1G04 IBIS model IBIS model 2018-05-25

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