双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AUP1G57

Low-power configurable multiple function gate

The 74AUP1G57 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • CMOS low power dissipation

  • High noise immunity

  • Overvoltage tolerant inputs to 3.6 V

  • Low noise overshoot and undershoot < 10 % of VCC

  • IOFF circuitry provides partial power-down mode operation

  • Latch-up performance exceeds 100 mA per JESD 78 Class II

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AUP1G57GM 0.8 - 3.6 CMOS ± 1.9 8.7 70 1 ultra low -40~125 XSON6
74AUP1G57GN 0.8 - 3.6 CMOS ± 1.9 8.7 70 1 ultra low -40~125 XSON6
74AUP1G57GS 0.8 - 3.6 CMOS ± 1.9 8.7 70 1 ultra low -40~125 XSON6
74AUP1G57GW 0.8 - 3.6 CMOS ± 1.9 8.7 70 1 ultra low -40~125 TSSOP6
74AUP1G57GX 0.8 - 3.6 CMOS ± 1.9 8.7 70 1 ultra low -40~125 X2SON6

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AUP1G57GM 74AUP1G57GM,115
(935279958115)		 Active aC SOT886
XSON6
(SOT886) 		SOT886 REFLOW_BG-BD-1
SOT886_115
74AUP1G57GM,132
(935279958132)		 Active aC SOT886_132
74AUP1G57GN 74AUP1G57GN,132
(935291743132)		 Active aC SOT1115
XSON6
(SOT1115) 		SOT1115 REFLOW_BG-BD-1
SOT1115_132
74AUP1G57GS 74AUP1G57GS,132
(935292867132)		 Active aC SOT1202
XSON6
(SOT1202) 		SOT1202 REFLOW_BG-BD-1
SOT1202_132
74AUP1G57GW 74AUP1G57GW,125
(935279957125)		 Active aC SOT363-2
TSSOP6
(SOT363-2) 		SOT363-2 SOT363-2_125
74AUP1G57GX 74AUP1G57GXZ
(935307121147)		 Active aC SOT1255-2
X2SON6
(SOT1255-2) 		SOT1255-2 SOT1255-2_147

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AUP1G57GM 74AUP1G57GM,115 74AUP1G57GM rohs rhf rhf
74AUP1G57GM 74AUP1G57GM,132 74AUP1G57GM rohs rhf rhf
74AUP1G57GN 74AUP1G57GN,132 74AUP1G57GN rohs rhf rhf
74AUP1G57GS 74AUP1G57GS,132 74AUP1G57GS rohs rhf rhf
74AUP1G57GW 74AUP1G57GW,125 74AUP1G57GW rohs rhf rhf
74AUP1G57GX 74AUP1G57GXZ 74AUP1G57GX rohs rhf rhf
品质及可靠性免责声明

文档 (34)

文件名称 标题 类型 日期
74AUP1G57 Low-power configurable multiple function gate Data sheet 2023-07-24
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11052 Pin FMEA for AUP family Application note 2019-01-09
001aab584 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-04
001aab585 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-03
001aab586 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-04
001aab587 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-03
001aab588 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-03
001aab589 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW Block diagram 2009-11-04
001aab583 Block diagram: 74AUP1G57GF, 74AUP1G57GM, 74AUP1G57GW, 74AUP1T57GF, 74AUP1T57GM, 74AUP1T57GW, 74LVC1G57GF, 74LVC1G57GM, 74LVC1G57GV, 74LVC1G57GW Block diagram 2009-11-03
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT886 3D model for products with SOT886 package Design support 2019-10-03
SOT1115 3D model for products with SOT1115 package Design support 2023-02-02
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
SOT1255-2 3D model for products with SOT1255-2 package Design support 2021-01-28
aup1g57 aup1g57 IBIS model IBIS model 2015-09-06
Nexperia_document_leaflet_Logic_SingleConfigurableLogic_201812 Single configurable logic Leaflet 2019-01-04
Nexperia_document_leaflet_Logic_X2SON_packages_062018 X2SON ultra-small 4, 5, 6 & 8-pin leadless packages Leaflet 2018-06-05
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DFN1410-6_SOT886_mk plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body Marcom graphics 2017-01-28
XSON6_SOT886_mk plastic, extremely thin small outline package; no leads; 6 terminals; 0.6 mm pitch; 1 mm x 1.45 mm x 0.5 mm body Marcom graphics 2017-01-28
XSON6_SOT1115_mk plastic, extremely thin small outline package; 6 terminals; 0.55 mm pitch; 0.9 mm x 1 mm x 0.35 mm body Marcom graphics 2017-01-28
SOT886 plastic, leadless extremely thin small outline package; 6 terminals; 0.5 mm pitch; 1 mm x 1.45 mm x 0.5 mm body Package information 2022-06-01
SOT1115 plastic, leadless extremely thin small outline package; 6 terminals; 0.3 mm pitch; 0.9 mm x 1 mm x 0.35 mm body Package information 2022-05-27
SOT1202 plastic, leadless extremely thin small outline package; 6 terminals; 0.35 mm pitch; 1 mm x 1mm x 0.35 mm body Package information 2022-06-01
SOT363-2 plastic thin shrink small outline package; 6 leads; body width 1.25 mm Package information 2022-11-21
SOT1255-2 plastic thermal enhanced extremely thin small outline package; no leads;6 terminals; body 1.0 x 0.8 x 0.32 mm Package information 2020-08-27
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT886 MAR_SOT886 Topmark Top marking 2013-06-03
MAR_SOT1115 MAR_SOT1115 Topmark Top marking 2013-06-03
MAR_SOT1202 MAR_SOT1202 Topmark Top marking 2013-06-03

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
SOT886 3D model for products with SOT886 package Design support 2019-10-03
SOT1115 3D model for products with SOT1115 package Design support 2023-02-02
SOT1202 3D model for products with SOT1202 package Design support 2023-02-02
SOT363-2 3D model for products with SOT363-2 package Design support 2023-02-02
SOT1255-2 3D model for products with SOT1255-2 package Design support 2021-01-28
aup1g57 aup1g57 IBIS model IBIS model 2015-09-06

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