双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVT16373A

3.3 V 16-bit transparent D-type latch; 3-state

The 74LVT16373A is a 16-bit D-type transparent latch with 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

特性

  • 16-bit transparent latch

  • 3-state buffers

  • Wide supply voltage range from 2.7 V to 3.6 V

  • BiCMOS high speed and output drive

  • Output capability: +64 mA/–32 mA

  • Direct interface with TTL levels

  • Overvoltage tolerant inputs to 5.5 V

  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

  • Live insertion/extraction permitted

  • Power-up reset

  • Power-up 3-state

  • No bus current loading when output is tied to 5 V bus

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to 85 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)Power dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVT16373ADGGProduction2.7 - 3.6TTL-32/+641.9medium-40~85821.835TSSOP48

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVT16373ADGG
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVT16373A74LVT16373ADGG,118
( 9352 030 90118 )

停产信息

型号可订购的器件编号，（订购码(12NC)）最后一次购买日期最后一次交货日期替代产品状态备注
74LVT16373ADGG935203090518
74LVT16373ADGG935203090512
74LVT16373ADGG9352030901122021-12-312022-06-3074LVT16373ADGG

    环境信息

    型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
    74LVT16373ADGG74LVT16373ADGG,11874LVT16373ADGGAlways Pb-free
    品质及可靠性免责声明

    文档 (6)

    文件名称标题类型日期
    74LVT16373A3.3 V 16-bit transparent D-type latch; 3-stateData sheet2024-07-08
    lvt16373alvt16373a IBIS modelIBIS model2013-04-07
    Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
    lvt16lvt16 Spice modelSPICE model2013-05-06
    SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
    SOT362-1plastic thin shrink small outline package; 48 leads; body width 6.1 mmPackage information2024-01-05

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    模型

    文件名称标题类型日期
    lvt16373alvt16373a IBIS modelIBIS model2013-04-07
    lvt16lvt16 Spice modelSPICE model2013-05-06

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