双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

Low-Voltage version A with TTL

Low-Voltage version A with TTL

LV-A supports a wide 2.0 V to 5.5 V supply voltage range and LV-AT supports a 4.5 V to 5.5 V supply voltage range.

Nexperia’s LV-A(T) technology family offers a typical 4.5 ns propagation delay, 20 μA standby current and it operates with low noise (VOL(p)  < 0.8 V). Our LV-A(T) range includes Asynchronous Logic and Control Logic solutions, all in TSSOP packages specified from −40 °C to +125 °.

主要特性和优势

Features and benefits

  • Wide supply voltage range, from 2.0 V to 5.5 V for LV-A and from 4.5 V to 5.5 V for LV-AT
  • Partial power down support (IOFF circuitry) for modular standby applications
  • Full range of gates, buffers, inverters and transceivers
  • Overvoltage tolerant inputs and low noise
  • Choice of CMOS or TTL input variants
  • Industry standard TSSOP packages

关键应用

Applications

  • Computing and peripherals (printers)
  • Smart TV and set-top boxes
  • Other electronics with standby

Parametric search

LV-A(T)
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Products

Analog & Logic ICs

型号 描述 状态 快速访问
74LV540APW Octal buffer/line driver; 3-state; inverting Production
74LV541APW Octal buffer/line driver; 3-state Production
74LV07ATPW Hex buffer with open-drain outputs Production
74LV04ATPW Hex inverter Production
74LV245ATPW Octal bus transceiver; 3-state Production
74LV244APW Octal buffer/line driver; 3-state Production
74LV02APW Quad 2-input NOR gate Production
74LV244ATPW Octal buffer/line driver; 3-state Production
74LV05APW Hex inverter with open-drain outputs Production
74LV165AD-Q100 8-bit parallel-in/serial-out shift register Production
74LV165AD 8-bit parallel-in/serial-out shift register Production
74LV17APW Hex buffer Schmitt trigger Production
74LV32APW Quad 2-input OR gate Production
74LV08APW Quad 2-input AND gate Production
74LV07APW Hex buffer with open-drain outputs Production
74LV00APW Quad 2-input NAND gate Production
74LV245APW Octal bus transceiver; 3-state Production
74LV541ATPW Octal buffer/line driver; 3-state Production
74LV7032APW-Q100 Quad 2-input OR gate with Schmitt trigger inputs Production
74LV165APW-Q100 8-bit parallel-in/serial-out shift register Production
74LV165APW 8-bit parallel-in/serial-out shift register Production
74LV14APW Hex inverting Schmitt trigger Production
74LV14ABZ Hex inverting Schmitt trigger Production
74LV7032APW Quad 2-input OR gate with Schmitt trigger inputs Production

Automotive qualified products (AEC-Q100/Q101)

型号 描述 状态 快速访问
74LV165AD-Q100 8-bit parallel-in/serial-out shift register Production
74LV7032APW-Q100 Quad 2-input OR gate with Schmitt trigger inputs Production
74LV165APW-Q100 8-bit parallel-in/serial-out shift register Production

Documentation

文件名称 标题 类型 日期
TSSOP14_SOT402-1_mk.png plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
Nexperia_document_leaflet_Logic_LV-AT_201903.pdf LV-A(T) logic family Leaflet 2019-03-19
vp_LV-AT.zip Low-Voltage version A with TTL Value proposition 2019-03-21
Nexperia_Selection_guide_2023.pdf Nexperia Selection Guide 2023 Selection guide 2023-05-10

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