可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74AHCT74BQ | 74AHCT74BQ,115 | 935278809115 | SOT762-1 | 订单产品 |
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Click here for more information74AHCT74BQ
Dual D-type flip-flop with set and reset; positive-edge trigger
The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has complementary outputs (Q and Q).
The set and reset are asynchronous active LOW inputs that operate independent of the clock input. Information on the data input is transferred to the Q output on the LOW to HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to the LOW to HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
Alternatives
Features and benefits
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than VCC
Input levels:
For 74AHC74: CMOS level
For 74AHCT74: TTL level
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
参数类型
| 型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74AHCT74BQ | 4.5 - 5.5 | TTL | ± 8 | 3.3 | 160 | low | -40~125 | DHVQFN14 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74AHCT74BQ | 74AHCT74BQ,115 (935278809115) |
Active | AHT74 |
DHVQFN14 (SOT762-1) |
SOT762-1 | SOT762-1_115 |
Series
文档 (9)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74AHC_AHCT74 | Dual D-type flip-flop with set and reset; positive-edge trigger | Data sheet | 2024-03-07 |
| AN11106 | Pin FMEA for AHC/AHCT family | Application note | 2019-01-09 |
| SOT762-1 | 3D model for products with SOT762-1 package | Design support | 2019-10-03 |
| ahct74 | ahct74 IBIS model | IBIS model | 2013-04-08 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN14_SOT762-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; 0.5 mm pitch; 2.5 mm x 3 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT762-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 14 terminals; 0.5 mm pitch; 2.5 x 3 x 1 mm body | Package information | 2023-04-05 |
| SOT762-1_115 | DHVQFN14; Reel pack for SMD, 7"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74AHCT74BQ_Nexperia_Product_Reliability | 74AHCT74BQ Nexperia Product Reliability | Quality document | 2024-06-16 |
订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74AHCT74BQ | 74AHCT74BQ,115 | 935278809115 | Active | SOT762-1_115 | 3,000 | 订单产品 |
样品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74AHCT74BQ
Dual D-type flip-flop with set and reset; positive-edge trigger
从安世半导体购买
| SKU | 库存* | MOQ | 单位价格 | 数量 |
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