双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AVC16374DGG

16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state

The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus-oriented applications. The 74AVC16374 consist of 2 sections of 8 edge-triggered flip-flops. A clock input (CP) and an output enable (OE) are provided per 8-bit section.

The 74AVC16374 is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, nOE should be tied to VCC through a pull-up resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient.

此产品已停产

Alternatives

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-1A (2.7 V to 3.6 V)

  • CMOS low power consumption

  • Input/output tolerant up to 3.6 V

  • Dynamic Controlled Output (DCO) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation

  • Low inductance multiple VCC and GND pins to minimize noise and ground bounce

  • Supports Live Insertion

Applications

参数类型

型号 Package name
74AVC16374DGG TSSOP48

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

下表中的所有产品型号均已停产 。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AVC16374DGG 74AVC16374DGG,112
(935265484112)		 Obsolete AVC16374 Standard Procedure Standard Procedure SOT362-1
TSSOP48
(SOT362-1) 		SOT362-1 SSOP-TSSOP-VSO-WAVE
暂无信息
74AVC16374DGG,118
(935265484118)		 Obsolete AVC16374 Standard Procedure Standard Procedure SOT362-1_118
74AVC16374DGG,511
(935265484511)		 Obsolete AVC16374 Standard Procedure Standard Procedure 暂无信息
74AVC16374DGG,512
(935265484512)		 Obsolete AVC16374 Standard Procedure Standard Procedure 暂无信息
74AVC16374DGG,518
(935265484518)		 Obsolete AVC16374 Standard Procedure Standard Procedure 暂无信息

环境信息

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AVC16374DGG 74AVC16374DGG,112 74AVC16374DGG rohs rhf rhf
74AVC16374DGG 74AVC16374DGG,118 74AVC16374DGG rohs rhf rhf
74AVC16374DGG 74AVC16374DGG,511 74AVC16374DGG rohs rhf rhf
74AVC16374DGG 74AVC16374DGG,512 74AVC16374DGG rohs rhf rhf
74AVC16374DGG 74AVC16374DGG,518 74AVC16374DGG rohs rhf rhf
品质及可靠性免责声明

Series

文档 (8)

文件名称 标题 类型 日期
74AVC16374 16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state Data sheet 2017-05-03
AN90007 Pin FMEA for AVC family Application note 2018-11-30
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22
avc16374 74AVC16374 IBIS model IBIS model 2019-01-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP48_SOT362-1_mk plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body Marcom graphics 2017-01-28
SOT362-1 plastic thin shrink small outline package; 48 leads; body width 6.1 mm Package information 2024-01-05
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名称 标题 类型 日期
avc16374 74AVC16374 IBIS model IBIS model 2019-01-09
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册