双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AVC32T245EC

32-bit dual supply translating transceiver with configurable voltage translation; 3-state

The 74AVC32T245 is a 32-bit transceiver with bidirectional level voltage translation and 3-state outputs. The device can be used as eight 8-bit input-output ports (nAn and nBn), two 16-bit transceiver or as a 32-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn and nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

此产品已停产

Features and benefits

  • Wide supply voltage range:
    • VCC(A): 0.8 V to 3.6 V
    • VCC(B): 0.8 V to 3.6 V
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM JESD22-A114F Class 3B exceeds 8000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101D exceeds 1000 V
  • Maximum data rates:
    • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)
    • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)
    • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)
    • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)
    • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)
    • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)
  • Suspend mode
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Inputs accept voltages up to 3.6 V
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications

    参数类型

    型号 Package name
    74AVC32T245EC LFBGA96

    封装

    下表中的所有产品型号均已停产 。

    型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
    74AVC32T245EC 74AVC32T245ECE
    (935284599551)    		 Obsolete VC32T245 Standard Procedure Standard Procedure no package information
    74AVC32T245ECK
    (935284599557)    		 Obsolete VC32T245 Standard Procedure Standard Procedure

    环境信息

    下表中的所有产品型号均已停产 。

    型号 可订购的器件编号 化学成分 RoHS RHF指示符
    74AVC32T245EC 74AVC32T245ECE 74AVC32T245EC rhf
    74AVC32T245EC 74AVC32T245ECK 74AVC32T245EC rhf
    品质及可靠性免责声明

    文档 (4)

    文件名称 标题 类型 日期
    74AVC32T245 32-bit dual supply translating transceiver with configurable voltage translation; 3-state Data sheet 2017-05-03
    AN90007 Pin FMEA for AVC family Application note 2018-11-30
    Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
    avc32t245 AVC32T245 IBIS model IBIS model 2013-05-01

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    模型

    文件名称 标题 类型 日期
    avc32t245 AVC32T245 IBIS model IBIS model 2013-05-01

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