可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
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74AVCH16T245DGG | 74AVCH16T245DGG,18 | 935286233118 | SOT362-1 | 订单产品 |
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Click here for more information16-bit dual supply translating transceiver with configurable voltage translation; 3-state
The 74AVCH16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual supplies (VCC(A) and VCC(B)) for voltage translation and four 8-bit input-output ports (nAn, nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between 0.8 V and 3.6 V making the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B outputs are in the high-impedance OFF-state. The bus-hold circuitry on the powered-up side always stays active.
The 74AVCH16T245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
Wide supply voltage range: VCC(A): 0.8 V to 3.6 V and VCC(B): 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
Maximum data rates:
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
IOFF circuitry provides partial Power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
型号 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name | Category |
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74AVCH16T245DGG | 0.8 - 3.6 | 0.8 - 3.6 | CMOS/LVTTL | ± 12 | 2.1 | 16 | very low | -40~125 | TSSOP48 | Bi-directional | Direction controlled |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
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74AVCH16T245DGG | 74AVCH16T245DGG,18 (935286233118) |
Active | AVCH16T245 |
TSSOP48 (SOT362-1) |
SOT362-1 |
SSOP-TSSOP-VSO-WAVE
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SOT362-1_118 |
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74AVCH16T245 | 16-bit dual supply translating transceiver with configurable voltage translation; 3-state | Data sheet | 2024-06-25 |
AN90007 | Pin FMEA for AVC family | Application note | 2018-11-30 |
Nexperia_document_guide_Logic_translators | Nexperia Logic Translators | Brochure | 2021-04-12 |
SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
avch16t245 | 74AVCH16T245 Ibis model | IBIS model | 2014-10-14 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP48_SOT362-1_mk | plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body | Marcom graphics | 2017-01-28 |
SOT362-1 | plastic thin shrink small outline package; 48 leads; body width 6.1 mm | Package information | 2024-01-05 |
SOT362-1_118 | TSSOP48; Reel pack for SMD, 13''; Q1/T1 product orientation | Packing information | 2020-04-21 |
74AVCH16T245DGG_Nexperia_Product_Reliability | 74AVCH16T245DGG Nexperia Product Reliability | Quality document | 2024-06-16 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
如果您需要设计/技术支持,请告知我们并填写 应答表 我们会尽快回复您。
文件名称 | 标题 | 类型 | 日期 |
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avch16t245 | 74AVCH16T245 Ibis model | IBIS model | 2014-10-14 |
SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
Model Name | 描述 |
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型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
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74AVCH16T245DGG | 74AVCH16T245DGG,18 | 935286233118 | Active | SOT362-1_118 | 2,000 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.