可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
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74HCT112PW | 74HCT112PW,118 | 935198490118 | SOT403-1 | 订单产品 |
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Click here for more informationDual JK flip-flop with set and reset; negative-edge trigger
The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
Input levels:
For 74HC112: CMOS level
For 74HCT112: TTL level
Asynchronous set and reset
Specified in compliance with JEDEC standard no. 7A
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
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74HCT112PW | 4.5 - 5.5 | TTL | ± 4 | 19 | 70 | low | -40~125 | 109 | 1 | 36.7 | TSSOP16 |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
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74HCT112PW | 74HCT112PW,118 (935198490118) |
Active | HCT112 |
TSSOP16 (SOT403-1) |
SOT403-1 |
SSOP-TSSOP-VSO-WAVE
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SOT403-1_118 |
文件名称 | 标题 | 类型 | 日期 |
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74HC_HCT112 | Dual JK flip-flop with set and reset; negative-edge trigger | Data sheet | 2024-01-15 |
AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
TSSOP16_SOT403-1_mk | plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
SOT403-1 | plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-08 |
SOT403-1_118 | TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
74HCT112PW_Nexperia_Product_Reliability | 74HCT112PW Nexperia Product Reliability | Quality document | 2024-06-16 |
HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
如果您需要设计/技术支持,请告知我们并填写 应答表 我们会尽快回复您。
文件名称 | 标题 | 类型 | 日期 |
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SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
Model Name | 描述 |
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型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
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74HCT112PW | 74HCT112PW,118 | 935198490118 | Active | SOT403-1_118 | 2,500 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.