可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74HCT2G02DP | 74HCT2G02DP,125 | 935271871125 | SOT505-2 | 订单产品 |
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Click here for more information74HCT2G02DP
Dual 2-input NOR gate
The 74HC2G02; 74HCT2G02 is a dual 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
The 74HCT2G02 features reduced input threshold levels to allow interfacing to TTL logic levels.
Alternatives
Features and benefits
Wide supply voltage range from 2.0 V to 6.0 V
Input levels:
For 74HC2G02: CMOS level
For 74HCT2G02: TTL level
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standard no. 7A (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
参数类型
| 型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74HCT2G02DP | 4.5 - 5.5 | TTL | ± 4 | 12 | 36 | 2 | low | -40~125 | 216 | 20.5 | 106 | TSSOP8 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74HCT2G02DP | 74HCT2G02DP,125 (935271871125) |
Active | T02 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
文档 (9)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74HC_HCT2G02 | Dual 2-input NOR gate | Data sheet | 2023-11-14 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
| SOT505-2_125 | TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2020-04-21 |
| 74HCT2G02DP_Nexperia_Product_Reliability | 74HCT2G02DP Nexperia Product Reliability | Quality document | 2024-06-16 |
支持
如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。
模型
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74HCT2G02DP | 74HCT2G02DP,125 | 935271871125 | Active | SOT505-2_125 | 3,000 | 订单产品 |
样品
作为 Nexperia 的客户，您可以通过我们的销售机构订购样品。
如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方经销商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74HCT2G02DP
Dual 2-input NOR gate
从安世半导体购买
| SKU | 库存* | MOQ | 单位价格 | 数量 |
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