可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74LV74PW | 74LV74PW,118 | 935175140118 | SOT402-1 | 订单产品 |
Register once, drag and drop ECAD models into your CAD tool and speed up your design.
Click here for more information74LV74PW
Dual D-type flip-flop with set and reset; positive-edge trigger
The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.
Alternatives
Features and benefits
Wide supply voltage range from 1.0 V to 5.5 V
Optimized for low voltage applications from 1.0 V to 3.6 V
CMOS low power dissipation
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Direct interface with TTL levels (2.7 V to 3.6 V)
- ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
参数类型
| 型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74LV74PW | 1.0 - 5.5 | TTL | ± 12 | 11 | 75 | low | -40~125 | TSSOP14 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
|
|
封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74LV74PW | 74LV74PW,118 (935175140118) |
Active | LV74 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
文档 (10)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74LV74 | Dual D-type flip-flop with set and reset; positive-edge trigger | Data sheet | 2024-04-08 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| lv74 | 74LV74 IBIS model | IBIS model | 2019-01-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
| SOT402-1_118 | TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LV74PW_Nexperia_Product_Reliability | 74LV74PW Nexperia Product Reliability | Quality document | 2024-06-16 |
| lv | lv Spice model | SPICE model | 2013-05-07 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74LV74PW | 74LV74PW,118 | 935175140118 | Active | SOT402-1_118 | 2,500 | 订单产品 |
样品
作为 Nexperia 的客户，您可以通过我们的销售机构订购样品。
如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方经销商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LV74PW
Dual D-type flip-flop with set and reset; positive-edge trigger
从安世半导体购买
| SKU | 库存* | MOQ | 单位价格 | 数量 |
|---|