可订购部件
| 型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
|---|---|---|---|---|
| 74LVT02PW | 74LVT02PW,118 | 935208980118 | SOT402-1 | 订单产品 |
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Click here for more information74LVT02PW
3.3 V Quad 2-input NOR gate
The 74LVT02 is a quad 2-input NOR gate. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 2.7 V to 3.6 V
Output capability: +64 mA and -32 mA
Direct interface with TTL levels
Overvoltage tolerant inputs to 5.5 V
Power-up 3-state
No bus current loading when output is tied to 5 V bus
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to 85 °C
参数类型
| 型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVT02PW | 2.7 - 3.6 | TTL | -32 / +64 | 2.8 | 150 | 4 | medium | -40~85 | 141 | 7.9 | 67 | TSSOP14 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封装
| 型号 | 可订购的器件编号，（订购码(12NC)） | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
|---|---|---|---|---|---|---|---|
| 74LVT02PW | 74LVT02PW,118 (935208980118) |
Active | LVT02 |
TSSOP14 (SOT402-1) |
SOT402-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT402-1_118 |
文档 (10)
| 文件名称 | 标题 | 类型 | 日期 |
|---|---|---|---|
| 74LVT02 | 3.3 V Quad 2-input NOR gate | Data sheet | 2024-04-18 |
| SOT402-1 | 3D model for products with SOT402-1 package | Design support | 2023-02-02 |
| lvt02 | lvt02 IBIS model | IBIS model | 2013-04-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP14_SOT402-1_mk | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT402-1 | plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-07 |
| SOT402-1_118 | TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LVT02PW_Nexperia_Product_Reliability | 74LVT02PW Nexperia Product Reliability | Quality document | 2024-06-16 |
| lvt | lvt Spice model | SPICE model | 2013-05-07 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
订购、定价与供货
| 型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
|---|---|---|---|---|---|---|
| 74LVT02PW | 74LVT02PW,118 | 935208980118 | Active | SOT402-1_118 | 2,500 | 订单产品 |
样品
作为 Nexperia 的客户，您可以通过我们的销售机构订购样品。
如果您没有 Nexperia 的直接账户，我们的全球和地区分销商网络可为您提供 Nexperia 样品支持。查看官方经销商列表。
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVT02PW
3.3 V Quad 2-input NOR gate
从安世半导体购买
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