双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LV32A

Quad 2-input OR gate

The 74LV32A is a quad 2-input OR gate.

Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

特性

  • Wide supply voltage range from 2.0 V to 5.5 V

  • Maximum tpd of 9.5 ns at 5 V

  • Typical VOL(p)< 0.8 V at VCC = 3.3 V, Tamb = 25 °C

  • Typical VOH(v)> 2.3 V at VCC = 3.3 V, Tamb = 25 °C

  • Supports mixed-mode voltage operation on all ports

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 250 mA per JESD 78 Class II

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)tpd (ns)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LV32APWProduction2.0 - 5.5CMOS± 124.2454low-40~1251407.566TSSOP14

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LV32APW
TSSOP14
(SOT402-1) 		SOT402-1SSOP-TSSOP-VSO-WAVE
SOT402-1_118Active74LV32A74LV32APWJ
( 9356 906 48118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LV32APW74LV32APWJ74LV32APWweek 25, 2019
品质及可靠性免责声明

文档 (6)

文件名称标题类型日期
74LV32AQuad 2-input OR gateData sheet2024-03-22
lv32a74LV32A IBIS modelIBIS model2019-01-08
Nexperia_document_leaflet_Logic_LV-AT_201903LV-A(T) logic familyLeaflet2019-03-19
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT402-1plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm bodyPackage information2023-11-07
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08

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模型

文件名称标题类型日期
lv32a74LV32A IBIS modelIBIS model2019-01-08

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