双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC16244A-Q100; 74LVCH16244A-Q100

16-bit buffer/line driver; 5 V input/output tolerant; 3-state

The 74LVC16244A-Q100; 74LVCH16244A-Q100 is a 16-bit buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

The 74LVCH16244A-Q100 bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

特性

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range from 1.2 V to 3.6 V

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic

  • IOFF circuitry provides partial Power-down mode operation

  • CMOS low power consumption

  • Multibyte flow-through standard pin-out architecture

  • Low inductance multiple power and ground pins for minimum noise and ground bounce

  • Direct interface with TTL levels

  • High-impedance when VCC = 0 V

  • All data inputs have bus hold. (74LVCH16244A-Q100 only)

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

参数类型

Type numberProduct statusVCC (V)Logic switching levelsOutput drive capability (mA)fmax (MHz)Nr of bitsPower dissipation considerationsTamb (°C)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package name
74LVC16244ADGG-Q100Production1.2 - 3.6CMOS/LVTTL± 2417516low-40~125822.037TSSOP48
74LVC16244ADGV-Q100Production1.2 - 3.6CMOS/LVTTL± 2417516low-40~125822.037TVSOP48
74LVCH16244ADGG-Q100Production1.2 - 3.6CMOS/LVTTL± 2417516low-40~125822.037TSSOP48
74LVCH16244ADGV-Q100Production1.2 - 3.6CMOS/LVTTL± 2417516low-40~125822.037TVSOP48

封装

型号封装尺寸版本回流焊/波峰焊包装状态标示可订购的器件编号，（订购码(12NC)）
74LVC16244ADGG-Q100
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVC16244A LVC16244A Standard Procedure Standard Procedure74LVC16244ADGG-Q1J
( 9353 016 67118 )
74LVC16244ADGV-Q100
TVSOP48
(SOT480-1) 		SOT480-1SOT480-1_118Active74LVC16244A74LVC16244ADGV-Q1J
( 9356 907 05118 )
74LVCH16244ADGG-Q100
TSSOP48
(SOT362-1) 		SOT362-1SSOP-TSSOP-VSO-WAVE
SOT362-1_118ActiveLVCH16244A74LVCH16244ADGG-QJ
( 9353 028 94118 )
74LVCH16244ADGV-Q100
TVSOP48
(SOT480-1) 		SOT480-1SOT480-1_118Active4LVCH16244A74LVCH16244ADGV-QJ
( 9356 907 07118 )

环境信息

型号可订购的器件编号化学成分RoHSRHF指示符无铅转换日期
74LVC16244ADGG-Q10074LVC16244ADGG-Q1J74LVC16244ADGG-Q100Always Pb-free
74LVC16244ADGV-Q10074LVC16244ADGV-Q1J74LVC16244ADGV-Q100week 25, 2019
74LVCH16244ADGG-Q10074LVCH16244ADGG-QJ74LVCH16244ADGG-Q100Always Pb-free
74LVCH16244ADGV-Q10074LVCH16244ADGV-QJ74LVCH16244ADGV-Q100week 25, 2019
品质及可靠性免责声明

文档 (10)

文件名称标题类型日期
74LVC_LVCH16244A_Q10016-bit buffer/line driver; 5 V input/output tolerant; 3-stateData sheet2024-04-09
AN263Power considerations when using CMOS and BiCMOS logic devicesApplication note2023-02-07
AN11009Pin FMEA for LVC familyApplication note2019-01-09
lvch16244alvch16244a IBIS modelIBIS model2013-04-07
lvc16244alvc16244a IBIS modelIBIS model2013-04-07
Nexperia_document_leaflet_Logic_TVSOP48_16bitPortfolio_201903Smaller-footprint 16-bit logic with advanced featuresLeaflet2019-03-29
Nexperia_Selection_guide_2023Nexperia Selection Guide 2023Selection guide2023-05-10
SOT480-1plastic, thin shrink small outline package; 48 leads; 0.4 mm pitch; 9.7 mm x 4.4 mm x 1.1 mm bodyPackage information2022-06-22
SSOP-TSSOP-VSO-WAVEFootprint for wave solderingWave soldering2009-10-08
SOT362-1plastic thin shrink small outline package; 48 leads; body width 6.1 mmPackage information2024-01-05

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模型

文件名称标题类型日期
lvch16244alvch16244a IBIS modelIBIS model2013-04-07
lvc16244alvc16244a IBIS modelIBIS model2013-04-07

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