双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AVC16373

16-bit D-type transparent latch; 3.6 V tolerant; 3-state

The 74AVC16373 is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. One latch enable (LE) input and one output enable (OE) input are provided per 8-bit section. The 74AVC16373 consist of two sections of eight D-type transparent latches with 3-state true outputs.

The 74AVC16373 is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, pin nOE should be tied to VCC through a pull-up resistor (Live Insertion).

A dynamic controlled output (DCO) circuitry is implemented to support termination line drive during transient.

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-1A (2.7 V to 3.6 V)

  • CMOS low power consumption

  • Input/output tolerant up to 3.6 V

  • Dynamic Controlled Output (DCO) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation

  • Low inductance multiple VCC and GND pins to minimize noise and ground bounce

  • Supports Live Insertion

Applications

文档 (4)

文件名称 标题 类型 日期
74AVC16373 16-bit D-type transparent latch; 3.6 V tolerant; 3-state Data sheet 2018-02-20
AN90007 Pin FMEA for AVC family Application note 2018-11-30
mna545 Block diagram: 74AVC16373DGG Block diagram 2009-11-04
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10

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