双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AXP1T57

Dual supply configurable multiple function gate

The 74AXP1T57 is a dual supply configurable multiple function gate with Schmitt-trigger inputs. It features three inputs (A, B and C), an output (Y) and dual supply pins (VCCI and VCCO). The inputs are referenced to VCCI and the output is referenced to VCCO. All inputs can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation. The 74AXP1T57 can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer.

This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range:

    • VCCI: 0.7 V to 2.75 V

    • VCCO: 1.2 V to 5.5 V

  • Low input capacitance; CI = 0.6 pF (typical)

  • Low output capacitance; CO = 1.8 pF (typical)

  • Low dynamic power consumption; CPD = 0.6 pF at VCCI = 1.2 V (typical)

  • Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical)

  • Low static power consumption; ICCI = 0.5 µA (85 °C maximum)

  • Low static power consumption; ICCO = 1.8 µA (85 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12A.01 (1.1 V to 1.3 V; A, B, C inputs)

    • JESD8-11A.01 (1.4 V to 1.6 V)

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A.01 (2.3 V to 2.7 V)

    • JESD8-C (2.7 V to 3.6 V; Y output)

    • JESD12-6 (4.5 V to 5.5 V; Y output)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV

    • CDM JESD22-C101E exceeds 1 kV

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 2.75 V

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

型号

封装

下表中的所有产品型号均已停产 。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AXP1T57DC 74AXP1T57DCH
(935305664125)		 Obsolete no package information
74AXP1T57GN 74AXP1T57GNX
(935305666115)		 Obsolete no package information
74AXP1T57GS 74AXP1T57GSX
(935305667115)		 Withdrawn / End-of-life rD SOT1203
XSON8
(SOT1203) 		SOT1203 REFLOW_BG-BD-1
SOT1203_115
74AXP1T57GT 74AXP1T57GTX
(935305668115)		 Obsolete no package information
74AXP1T57GX 74AXP1T57GXX
(935308434115)		 Withdrawn / End-of-life rD SOT1233-2
X2SON8
(SOT1233-2) 		SOT1233-2 SOT1233-2_115

环境信息

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AXP1T57DC 74AXP1T57DCH 74AXP1T57DC rohs rhf rhf
74AXP1T57GN 74AXP1T57GNX 74AXP1T57GN rohs rhf rhf
74AXP1T57GS 74AXP1T57GSX 74AXP1T57GS rohs rhf rhf
74AXP1T57GT 74AXP1T57GTX 74AXP1T57GT rohs rhf rhf
74AXP1T57GX 74AXP1T57GXX 74AXP1T57GX rohs rhf rhf
品质及可靠性免责声明

文档 (16)

文件名称 标题 类型 日期
74AXP1T57 Dual supply configurable multiple function gate Data sheet 2022-06-17
AN90029 Pin FMEA for AXPnT family Application note 2021-07-13
Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT1233-2 3D model for products with SOT1233-2 package Design support 2021-01-28
axp1t57 74AXP1T57 IBIS model IBIS model 2016-03-01
Nexperia_document_leaflet_Logic_X2SON_packages_062018 X2SON ultra-small 4, 5, 6 & 8-pin leadless packages Leaflet 2018-06-05
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 AXP – Extremely low-power logic technology portfolio Leaflet 2019-04-05
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
XSON8_SOT1203_mk plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Marcom graphics 2019-02-04
SOT1203 plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Package information 2022-06-03
SOT1233-2 plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mm Package information 2022-04-21
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT1203 MAR_SOT1203 Topmark Top marking 2013-06-03

支持

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模型

文件名称 标题 类型 日期
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT1233-2 3D model for products with SOT1233-2 package Design support 2021-01-28
axp1t57 74AXP1T57 IBIS model IBIS model 2016-03-01

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