双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVT162373DGG

3.3 V 16-bit transparent D-type latch with 30 Ohm termination resistors; 3-state

The 74LVT162373 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.

This device is a 16-bit transparent D-type latch with non-inverting 3-state bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When latch enable (LE) input is HIGH, the Q outputs follow the date (D) inputs. When latch enable is taken LOW, the Q outputs are latched at the levels of the D inputs one setup time prior to the HIGH-to-LOW transition.

The 74LVT162373 is designed with 30 Ω series resistance in both the HIGH-state and LOW-state of the output. This design reduces the noise in applications such as memory address drivers, clock drivers and bus receivers and transmitters.

Features and benefits

  • 16-bit transparent latch

  • 3-state buffers

  • Output capability: +12 mA/–12 mA

  • TTL input and output switching levels

  • Input and output interface capability to systems at 5 V supply

  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

  • Live insertion/extraction permitted

  • Outputs include series resistance of 30 Ω making external termination resistors unnecessary

  • Power-up reset

  • Power-up 3-state

  • No bus current loading when output is tied to 5 V bus

  • Latch-up protection:

    • JESD78B Class II exceeds 500 mA

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Package name
74LVT162373DGG 2.7 - 3.6 TTL ± 12 2.5 medium -40~85 TSSOP48

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVT162373DGG 74LVT162373DGG,118
(935264164118)		 Active LVT162373 SOT362-1
TSSOP48
(SOT362-1) 		SOT362-1 SSOP-TSSOP-VSO-WAVE
SOT362-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVT162373DGG 74LVT162373DGG,118 74LVT162373DGG rohs rhf rhf
品质及可靠性免责声明

Series

文档 (9)

文件名称 标题 类型 日期
74LVT162373 3.3 V 16-bit transparent D-type latch with 30 Ω termination resistors; 3-state Data sheet 2024-07-08
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22
lvt162373 lvt162373 IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP48_SOT362-1_mk plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body Marcom graphics 2017-01-28
SOT362-1 plastic thin shrink small outline package; 48 leads; body width 6.1 mm Package information 2024-01-05
SOT362-1_118 TSSOP48; Reel pack for SMD, 13''; Q1/T1 product orientation Packing information 2020-04-21
74LVT162373DGG_Nexperia_Product_Reliability 74LVT162373DGG Nexperia Product Reliability Quality document 2024-06-16
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

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模型

文件名称 标题 类型 日期
lvt162373 lvt162373 IBIS model IBIS model 2013-04-09
SOT362-1 3D model for products with SOT362-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74LVT162373DGG 74LVT162373DGG,118 935264164118 Active SOT362-1_118 2,000 订单产品

样品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LVT162373DGG 74LVT162373DGG,118 935264164118 SOT362-1 订单产品