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Click here for more information74LVCH16244AEV
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
The 74LVC16244A; 74LVCH16244A is a 16-bit buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
The 74LVCH16244A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.
Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
5 V tolerant inputs/outputs for interfacing with 5 V logic
IOFF circuitry provides partial Power-down mode operation
CMOS low power consumption
Multibyte flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
High-impedance when VCC = 0 V
All data inputs have bus hold. (74LVCH16244A only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
参数类型
型号 | Package name |
---|---|
74LVCH16244AEV | VFBGA56 |
封装
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74LVCH16244AEV | 74LVCH16244AEV,118 (935270792118) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | no package information | |||
74LVCH16244AEV,151 (935270792151) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEV,157 (935270792157) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEV,518 (935270792518) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEVE (935270792551) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEVK (935270792557) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEV/G;5 (935281129518) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEV/G,5 (935281129551) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure | |||||
74LVCH16244AEV/G:5 (935281129557) |
Obsolete | LVCH16244A Standard Procedure Standard Procedure |
环境信息
下表中的所有产品型号均已停产 。
Series
文档 (4)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LVC_LVCH16244A | 16-bit buffer/line driver; 5 V input/output tolerant; 3-state | Data sheet | 2024-04-09 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
lvch16244a | lvch16244a IBIS model | IBIS model | 2013-04-09 |
支持
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模型
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
lvch16244a | lvch16244a IBIS model | IBIS model | 2013-04-09 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.