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Click here for more information74LVC161DB
Presettable synchronous 4-bit binary counter; asynchronous reset
The 74LVC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
Alternatives
Features and benefits
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
Direct interface with TTL levels
Asynchronous reset
Synchronous counting and loading
Two count enable inputs for n-bit cascading
Positive edge-triggered clock
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
参数类型
型号 | Package name |
---|---|
74LVC161DB | SSOP16 |
PCB Symbol, Footprint and 3D Model
Model Name | 描述 |
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封装
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74LVC161DB | 74LVC161DB,118 (935210520118) |
Withdrawn / End-of-life | LVC161 |
SSOP16 (SOT338-1) |
SOT338-1 |
SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE |
暂无信息 |
74LVC161DB,112 (935210520112) |
Obsolete | LVC161 | 暂无信息 |
环境信息
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号 | 化学成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74LVC161DB | 74LVC161DB,118 | 74LVC161DB | ||
74LVC161DB | 74LVC161DB,112 | 74LVC161DB |
文档 (10)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LVC161 | Presettable synchronous 4-bit binary counter; asynchronous reset | Data sheet | 2024-02-12 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
lvc161 | lvc161 IBIS model | IBIS model | 2013-04-08 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
SSOP16_SOT338-1_mk | plastic, shrink small outline package; 16 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body | Marcom graphics | 2017-01-28 |
SOT338-1 | plastic, shrink small outline package; 16 leads; 0.65 mm pitch; 6.2 mm x 5.3 mm x 2 mm body | Package information | 2022-06-20 |
SSOP-TSSOP-VSO-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
lvc | lvc Spice model | SPICE model | 2013-05-07 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.