双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVT573D

3.3 V octal D-type transparent latch; 3-state

The 74LVT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

Features and benefits

  • Wide supply voltage range from 2.7 to 3.6 V

  • Inputs and outputs arranged for easy interfacing to microprocessors

  • 3-state outputs for bus interfacing

  • Common output enable control

  • Overvoltage tolerant inputs to 5.5 V

  • BiCMOS high speed and output drive

  • Direct interface with TTL levels

  • Input and output interface capability to systems at 5 V supply

  • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

  • Live insertion and extraction permitted

  • No bus current loading when output is tied to 5 V bus

  • Power-up reset

  • Power-up 3-state

  • IOFF circuitry provides partial Power-down mode operation

  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

  • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LVT573D 2.7 - 3.6 TTL -32/+64 2.7 medium -40~85 84 26.8 60 SO20

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LVT573D 74LVT573D,118
(935170700118)		 Active 74LVT573D SOT163-1
SO20
(SOT163-1) 		SOT163-1 WAVE_BG-BD-1
SOT163-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LVT573D 74LVT573D,118 74LVT573D rohs rhf rhf
品质及可靠性免责声明

Series

文档 (9)

文件名称 标题 类型 日期
74LVT573 3.3 V octal D-type transparent latch; 3-state Data sheet 2024-06-07
SOT163-1 3D model for products with SOT163-1 package Design support 2020-01-22
lvt573 lvt573 IBIS model IBIS model 2013-04-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT163-1 plastic, small outline package; 20 leads; 1.27 mm pitch; 12.8 mm x 7.5 mm x 2.65 mm body Package information 2024-11-15
SOT163-1_118 SO20; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2022-08-01
74LVT573D_Nexperia_Product_Reliability 74LVT573D Nexperia Product Reliability Quality document 2024-06-16
lvt lvt Spice model SPICE model 2013-05-07
WAVE_BG-BD-1 Wave soldering profile Wave soldering 2021-09-08

支持

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模型

文件名称 标题 类型 日期
lvt573 lvt573 IBIS model IBIS model 2013-04-09
lvt lvt Spice model SPICE model 2013-05-07
SOT163-1 3D model for products with SOT163-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74LVT573D 74LVT573D,118 935170700118 Active SOT163-1_118 2,000 订单产品

样品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LVT573D 74LVT573D,118 935170700118 SOT163-1 订单产品