双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LV00PW

Quad 2-input NAND gate

The 74LV00 is a quad 2-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

Alternatives

Features and benefits

  • Wide supply voltage range from 1.0 to 5.5 V

  • CMOS low power dissipation

  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

  • Optimized for low voltage applications: 1.0 V to 3.6 V

  • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

  • Complies with JEDEC standards:

    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
    • JESD36 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) tpd (ns) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Rth(j-a) (K/W) Ψth(j-top) (K/W) Rth(j-c) (K/W) Package name
74LV00PW 1.0 - 5.5 TTL ± 12 7.0 30 4 low -40~125 131 4.5 56.3 TSSOP14

PCB Symbol, Footprint and 3D Model

Model Name 描述

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74LV00PW 74LV00PW,118
(935174100118)		 Active LV00 SOT402-1
TSSOP14
(SOT402-1) 		SOT402-1 SSOP-TSSOP-VSO-WAVE
SOT402-1_118

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74LV00PW 74LV00PW,118 74LV00PW rohs rhf rhf
品质及可靠性免责声明

Series

文档 (10)

文件名称 标题 类型 日期
74LV00 Quad 2-input NAND gate Data sheet 2024-01-22
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02
lv00 74LV00 IBIS model IBIS model 2019-01-09
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP14_SOT402-1_mk plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT402-1 plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-07
SOT402-1_118 TSSOP14; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74LV00PW_Nexperia_Product_Reliability 74LV00PW Nexperia Product Reliability Quality document 2024-06-16
lv lv Spice model SPICE model 2013-05-07
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
lv00 74LV00 IBIS model IBIS model 2019-01-09
lv lv Spice model SPICE model 2013-05-07
SOT402-1 3D model for products with SOT402-1 package Design support 2023-02-02

PCB Symbol, Footprint and 3D Model

Model Name 描述

订购、定价与供货

型号 Orderable part number Ordering code (12NC) 状态 包装 Packing Quantity 在线购买
74LV00PW 74LV00PW,118 935174100118 Active SOT402-1_118 2,500 订单产品

样品

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How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

交互式数据手册

可订购部件

型号 可订购的器件编号 订购代码(12NC) 封装 从经销商处购买
74LV00PW 74LV00PW,118 935174100118 SOT402-1 订单产品