可订购部件
型号 | 可订购的器件编号 | 订购代码(12NC) | 封装 | 从经销商处购买 |
---|---|---|---|---|
74LVC1G10GW-Q100 | 74LVC1G10GW-Q100H | 935309202125 | SOT363-2 | 订单产品 |
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Click here for more informationSingle 3-input NAND gate
The 74LVC1G10-Q100 provides a low-power, low-voltage single 3-input NAND gate.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall time.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
---|---|---|---|---|---|---|---|---|---|
74LVC1G10GW-Q100 | 1.65 - 5.5 | CMOS/LVTTL | ± 32 | 2.6 | 175 | 1 | low | -40~125 | TSSOP6 |
Model Name | 描述 |
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型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74LVC1G10GW-Q100 | 74LVC1G10GW-Q100H (935309202125) |
Active | YM |
TSSOP6 (SOT363-2) |
SOT363-2 | SOT363-2_125 |
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74LVC1G10_Q100 | Single 3-input NAND gate | Data sheet | 2023-08-14 |
AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
SOT363-2 | 3D model for products with SOT363-2 package | Design support | 2023-02-02 |
lvc1g10 | 74LVC1G10 IBIS model | IBIS model | 2014-10-20 |
SOT363-2 | plastic thin shrink small outline package; 6 leads; body width 1.25 mm | Package information | 2022-11-21 |
SOT363-2_125 | TSSOP6 ; Reel pack for SMD, 7"; Q3/T4 product orientation | Packing information | 2022-11-04 |
74LVC1G10GW-Q100_Nexperia_Product_Reliability | 74LVC1G10GW-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
型号 | Orderable part number | Ordering code (12NC) | 状态 | 包装 | Packing Quantity | 在线购买 |
---|---|---|---|---|---|---|
74LVC1G10GW-Q100 | 74LVC1G10GW-Q100H | 935309202125 | Active | SOT363-2_125 | 3,000 | 订单产品 |
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The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.