双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AUP2G240

Low-power dual inverting buffer/line driver; 3-state

The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE is HIGH.

Features and benefits

  • Wide supply voltage range from 0.8 V to 3.6 V

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-12 (0.8 V to 1.3 V)

    • JESD8-11 (0.9 V to 1.65 V)

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8-B (2.7 V to 3.6 V)

  • Low static power consumption; ICC = 0.9 μA (maximum)

  • Latch-up performance exceeds 100 mA per JESD78 Class II

  • Inputs accept voltages up to 3.6 V

  • Low-noise overshoot and undershoot < 10 % of VCC

  • Input-disable feature allows floating input conditions

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Multiple package options

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

参数类型

型号 VCC (V) Logic switching levels Output drive capability (mA) fmax (MHz) Nr of bits Power dissipation considerations Tamb (°C) Package name
74AUP2G240DC 0.8 - 3.6 CMOS ± 1.9 70 2 ultra low -40~125 VSSOP8
74AUP2G240GN 0.8 - 3.6 CMOS ± 1.9 70 2 ultra low -40~125 XSON8
74AUP2G240GS 0.8 - 3.6 CMOS ± 1.9 70 2 ultra low -40~125 XSON8
74AUP2G240GT 0.8 - 3.6 CMOS ± 1.9 70 2 ultra low -40~125 XSON8

封装

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AUP2G240DC 74AUP2G240DC,125
(935280736125)		 Active p40 SOT765-1
VSSOP8
(SOT765-1) 		SOT765-1 SOT765-1_125
74AUP2G240GN 74AUP2G240GN,115
(935292224115)		 Active p2 SOT1116
XSON8
(SOT1116) 		SOT1116 REFLOW_BG-BD-1
SOT1116_115
74AUP2G240GS 74AUP2G240GS,115
(935292784115)		 Active p2 SOT1203
XSON8
(SOT1203) 		SOT1203 REFLOW_BG-BD-1
SOT1203_115
74AUP2G240GT 74AUP2G240GT,115
(935280737115)		 Active p40 SOT833-1
XSON8
(SOT833-1) 		SOT833-1 SOT833-1_115

下表中的所有产品型号均已停产 。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AUP2G240GD 74AUP2G240GD,125
(935288875125)		 Obsolete p40 Standard Procedure Standard Procedure SOT996-2
XSON8
(SOT996-2) 		SOT996-2 SOT996-2_125
74AUP2G240GF 74AUP2G240GF,115
(935291479115)		 Obsolete p2 SOT1089
XSON8
(SOT1089) 		SOT1089 REFLOW_BG-BD-1
SOT1089_115
74AUP2G240GM 74AUP2G240GM,125
(935281437125)		 Obsolete p40 SOT902-2
XQFN8
(SOT902-2) 		SOT902-2 SOT902-2_125

环境信息

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AUP2G240DC 74AUP2G240DC,125 74AUP2G240DC rohs rhf rhf
74AUP2G240GN 74AUP2G240GN,115 74AUP2G240GN rohs rhf rhf
74AUP2G240GS 74AUP2G240GS,115 74AUP2G240GS rohs rhf rhf
74AUP2G240GT 74AUP2G240GT,115 74AUP2G240GT rohs rhf rhf

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AUP2G240GD 74AUP2G240GD,125 74AUP2G240GD rohs rhf rhf
74AUP2G240GF 74AUP2G240GF,115 74AUP2G240GF rohs rhf rhf
74AUP2G240GM 74AUP2G240GM,125 74AUP2G240GM rohs rhf rhf
品质及可靠性免责声明

文档 (31)

文件名称 标题 类型 日期
74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Data sheet 2023-07-27
AN10161 PicoGate Logic footprints Application note 2002-10-29
AN11052 Pin FMEA for AUP family Application note 2019-01-09
001aah783 Block diagram: 74AUP2G240DC, 74AUP2G240GD, 74AUP2G240GM, 74AUP2G240GT Block diagram 2009-11-04
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT1089 3D model for products with SOT1089 package Design support 2019-10-07
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28
aup2g240 aup2g240 IBIS model IBIS model 2013-04-07
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 Leaflet 2019-04-12
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
VSSOP8_SOT765-1_mk plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Marcom graphics 2017-01-28
XSON8_SOT1089_mk plastic, extremely thin small outline package; no leads; 8 terminals; 0.55 mm pitch; 1.35 mm x 1 mm x 0.5 mm body Marcom graphics 2017-01-28
XQFN8_SOT902-2_mk plastic, extremely thin quad flat package; 8 terminals; 0.55 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm body Marcom graphics 2017-01-28
XSON8_SOT1203_mk plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Marcom graphics 2019-02-04
SOT765-1 plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Package information 2022-06-03
SOT996-2 plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 3 mm x 2 mm x 0.5 mm body Package information 2020-04-21
SOT1089 plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.5 mm body Package information 2022-06-03
SOT902-2 plastic, leadless extremely thin quad flat package; 8 terminals; 0.5 mm pitch; 1.6 mm x 1.6 mm x 0.5 mm body Package information 2020-04-21
SOT1116 plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body Package information 2022-06-02
SOT1203 plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Package information 2022-06-03
SOT833-1 plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body Package information 2022-06-03
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT1089 MAR_SOT1089 Topmark Top marking 2013-06-03
MAR_SOT1116 MAR_SOT1116 Topmark Top marking 2013-06-03
MAR_SOT1203 MAR_SOT1203 Topmark Top marking 2013-06-03
MAR_SOT833 MAR_SOT833 Topmark Top marking 2013-06-03

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT1089 3D model for products with SOT1089 package Design support 2019-10-07
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28
aup2g240 aup2g240 IBIS model IBIS model 2013-04-07

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