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Click here for more information74ALVT16601DGG
18-bit universal bus transceiver; 3-state
The 74ALVT16601 is a high-performance Bipolar Complementary Metal Oxide Semiconductor (BiCMOS) product designed for VCC operation at 2.5 V and 3.3 V with I/O compatibility up to 5 V. This device is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A-bus data is latched if CPAB is held at a HIGH or LOW level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is LOW, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. The clocks can be controlled with the clock enable inputs (CEAB and CEBA).
Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features and benefits
- 18-bit bidirectional bus interface
- 5 V I/O compatible
- 3-state buffers
- Output capability: +64 mA and -32 mA
- TTL input and output switching levels
- Input and output interface capability to systems at 5 V supply
- Bus hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
- Live insertion and extraction permitted
- Power-up reset
- Power-up 3-state
- No bus current loading when output is tied to 5 V bus
- Positive-edge triggered clock inputs
- Latch-up protection:
- JESD78: exceeds 500 mA
- ESD protection:
- MIL STD 883, method 3015: exceeds 2000 V
- Machine model: exceeds 200 V
Applications
参数类型
型号 | Package name |
---|---|
74ALVT16601DGG | TSSOP56 |
封装
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74ALVT16601DGG | 74ALVT16601DGG,112 (935219460112) |
Obsolete | ALVT16601 Standard Procedure Standard Procedure |
![]() TSSOP56 (SOT364-1) |
SOT364-1 |
SSOP-TSSOP-VSO-WAVE
|
暂无信息 |
74ALVT16601DGG,118 (935219460118) |
Obsolete | ALVT16601 Standard Procedure Standard Procedure | SOT364-1_118 | ||||
74ALVT16601DGGS (935219460512) |
Obsolete | ALVT16601 Standard Procedure Standard Procedure | 暂无信息 | ||||
74ALVT16601DGGY (935219460518) |
Obsolete | ALVT16601 Standard Procedure Standard Procedure | 暂无信息 |
环境信息
下表中的所有产品型号均已停产 。
Series
文档 (7)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74ALVT16601 | 18-bit universal bus transceiver; 3-state | Data sheet | 2005-07-04 |
SOT364-1 | 3D model for products with SOT364-1 package | Design support | 2020-01-22 |
alvt16601 | alvt16601 IBIS model | IBIS model | 2013-04-08 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
SOT364-1 | plastic, thin shrink small outline package; 56 leads; 0.5 mm pitch; 14 mm x 6.1 mm x 1.2 mm body | Package information | 2022-06-23 |
alvt16 | alvt16 Spice model | SPICE model | 2013-05-07 |
SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.