双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AXP2T3407

Dual supply single buffer and single buffer with open-drain

The 74AXP2T3407 is a dual supply single buffer and a single buffer with open-drain output. It features two input pins (nA), an output pin (1Y) and an open-drain output pin (2Y) and dual supply pins (VCCI and VCCO). The inputs are referenced to VCCI and the output is referenced to VCCO. All inputs can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range:

    • VCCI: 0.7 V to 2.75 V

    • VCCO: 1.2 V to 5.5 V

  • Low input capacitance; CI = 0.6 pF (typical)

  • Low output capacitance; CO = 1.8 pF (typical) for 1Y

  • Low output capacitance; CO = 1.3 pF (typical) for 2Y

  • Low dynamic power consumption; CPD = 0.4 pF at VCCI = 1.2 V (typical)

  • Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical)

  • Low static power consumption; ICCI = 0.5 μA (85 °C maximum)

  • Low static power consumption; ICCO = 1.8 μA (85 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12A.01 (1.1 V to 1.3 V; nA inputs)

    • JESD8-11A.01 (1.4 V to 1.6 V)

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A.01 (2.3 V to 2.7 V)

    • JESD8-C (2.7 V to 3.6 V; nY outputs)

    • JESD12-6 (4.5 V to 5.5 V; nY outputs)

  • ESD protection:

    • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV

    • CDM JESD22-C101E exceeds 1000 V

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 2.75 V

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Multiple package options

  • Specified from -40 °C to +85 °C

参数类型

型号

封装

下表中的所有产品型号均已停产 。

型号 可订购的器件编号，（订购码(12NC)） 状态 标示 封装 外形图 回流焊/波峰焊 包装
74AXP2T3407DC 74AXP2T3407DCH
(935306972125)		 Withdrawn / End-of-life r4 SOT765-1
VSSOP8
(SOT765-1) 		SOT765-1 SOT765-1_125
74AXP2T3407GN 74AXP2T3407GNX
(935306975115)		 Withdrawn / End-of-life r4 SOT1116
XSON8
(SOT1116) 		SOT1116 REFLOW_BG-BD-1
SOT1116_115
74AXP2T3407GS 74AXP2T3407GSX
(935306976115)		 Withdrawn / End-of-life r4 SOT1203
XSON8
(SOT1203) 		SOT1203 REFLOW_BG-BD-1
SOT1203_115
74AXP2T3407GT 74AXP2T3407GTX
(935306977115)		 Discontinued / End-of-life r4 SOT833-1
XSON8
(SOT833-1) 		SOT833-1 SOT833-1_115

环境信息

下表中的所有产品型号均已停产 。

型号 可订购的器件编号 化学成分 RoHS RHF指示符
74AXP2T3407DC 74AXP2T3407DCH 74AXP2T3407DC rohs rhf rhf
74AXP2T3407GN 74AXP2T3407GNX 74AXP2T3407GN rohs rhf rhf
74AXP2T3407GS 74AXP2T3407GSX 74AXP2T3407GS rohs rhf rhf
74AXP2T3407GT 74AXP2T3407GTX 74AXP2T3407GT rohs rhf rhf
品质及可靠性免责声明

文档 (23)

文件名称 标题 类型 日期
74AXP2T3407 Dual supply single buffer and single buffer with open-drain Data sheet 2017-03-17
AN90029 Pin FMEA for AXPnT family Application note 2021-07-13
Nexperia_document_guide_Logic_translators Nexperia Logic Translators Brochure 2021-04-12
Nexperia_document_guide_MiniLogic_PicoGate_201901 PicoGate leaded logic portfolio guide Brochure 2019-01-07
Nexperia_document_guide_MiniLogic_MicroPak_201808 MicroPak leadless logic portfolio guide Brochure 2018-09-03
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28
axp2t3407 74AXP2T3407 IBIS model IBIS model 2016-03-03
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 AXP – Extremely low-power logic technology portfolio Leaflet 2019-04-05
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
VSSOP8_SOT765-1_mk plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Marcom graphics 2017-01-28
XSON8_SOT1203_mk plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Marcom graphics 2019-02-04
SOT765-1 plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body Package information 2022-06-03
SOT1116 plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body Package information 2022-06-02
SOT1203 plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body Package information 2022-06-03
SOT833-1 plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body Package information 2022-06-03
REFLOW_BG-BD-1 Reflow soldering profile Reflow soldering 2021-04-06
Nexperia_Selection_guide_2023 Nexperia Selection Guide 2023 Selection guide 2023-05-10
MAR_SOT1116 MAR_SOT1116 Topmark Top marking 2013-06-03
MAR_SOT1203 MAR_SOT1203 Topmark Top marking 2013-06-03
MAR_SOT833 MAR_SOT833 Topmark Top marking 2013-06-03

支持

如果您需要设计/技术支持，请告知我们并填写 应答表 我们会尽快回复您。

模型

文件名称 标题 类型 日期
SOT765-1 3D model for products with SOT765-1 package Design support 2020-01-22
SOT1116 3D model for products with SOT1116 package Design support 2023-02-02
SOT1203 3D model for products with SOT1203 package Design support 2023-02-02
SOT833-1 3D model for products with SOT833-1 package Design support 2021-01-28
axp2t3407 74AXP2T3407 IBIS model IBIS model 2016-03-03

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