74AUP1G74
Low-power D-type flip-flop with set and reset; positive-edge trigger
The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
CMOS low power dissipation
High noise immunity
Overvoltage tolerant inputs to 3.6 V
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
参数类型
型号 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
---|---|---|---|---|---|---|---|---|
74AUP1G74DC | 0.8 - 3.6 | CMOS | ± 1.9 | 9.2 | 400 | ultra low | -40~125 | VSSOP8 |
74AUP1G74GN | 0.8 - 3.6 | CMOS | ± 1.9 | 9.2 | 400 | ultra low | -40~125 | XSON8 |
74AUP1G74GS | 0.8 - 3.6 | CMOS | ± 1.9 | 9.2 | 400 | ultra low | -40~125 | XSON8 |
74AUP1G74GT | 0.8 - 3.6 | CMOS | ± 1.9 | 9.2 | 400 | ultra low | -40~125 | XSON8 |
74AUP1G74GX | 0.8 - 3.6 | CMOS | ± 1.9 | 9.2 | 400 | ultra low | -40~125 | X2SON8 |
封装
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74AUP1G74DC | 74AUP1G74DC,125 (935280717125) |
Active | p74 |
VSSOP8 (SOT765-1) |
SOT765-1 | SOT765-1_125 | |
74AUP1G74GN | 74AUP1G74GN,115 (935292215115) |
Active | 54 |
XSON8 (SOT1116) |
SOT1116 |
REFLOW_BG-BD-1
|
SOT1116_115 |
74AUP1G74GS | 74AUP1G74GS,115 (935292775115) |
Active | 54 |
XSON8 (SOT1203) |
SOT1203 |
REFLOW_BG-BD-1
|
SOT1203_115 |
74AUP1G74GT | 74AUP1G74GT,115 (935280718115) |
Active | p74 |
XSON8 (SOT833-1) |
SOT833-1 | SOT833-1_115 | |
74AUP1G74GX | 74AUP1G74GXX (935308441115) |
Active | 54 |
X2SON8 (SOT1233-2) |
SOT1233-2 | SOT1233-2_115 |
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号,(订购码(12NC)) | 状态 | 标示 | 封装 | 外形图 | 回流焊/波峰焊 | 包装 |
---|---|---|---|---|---|---|---|
74AUP1G74GD | 74AUP1G74GD,125 (935286839125) |
Obsolete | p74 |
XSON8 (SOT996-2) |
SOT996-2 | SOT996-2_125 |
环境信息
型号 | 可订购的器件编号 | 化学成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74AUP1G74DC | 74AUP1G74DC,125 | 74AUP1G74DC | ||
74AUP1G74GN | 74AUP1G74GN,115 | 74AUP1G74GN | ||
74AUP1G74GS | 74AUP1G74GS,115 | 74AUP1G74GS | ||
74AUP1G74GT | 74AUP1G74GT,115 | 74AUP1G74GT | ||
74AUP1G74GX | 74AUP1G74GXX | 74AUP1G74GX |
下表中的所有产品型号均已停产 。
型号 | 可订购的器件编号 | 化学成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74AUP1G74GD | 74AUP1G74GD,125 | 74AUP1G74GD |
文档 (28)
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
74AUP1G74 | Low-power D-type flip-flop with set and reset; positive-edge trigger | Data sheet | 2023-07-14 |
AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
AN11052 | Pin FMEA for AUP family | Application note | 2019-01-09 |
001aae087 | Block diagram: 74AUP1G74DC, 74AUP1G74GD, 74AUP1G74GM, 74AUP1G74GT | Block diagram | 2009-11-04 |
Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
SOT1116 | 3D model for products with SOT1116 package | Design support | 2023-02-02 |
SOT1203 | 3D model for products with SOT1203 package | Design support | 2023-02-02 |
SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
aup1g74 | aup1g74 IBIS model | IBIS model | 2013-04-07 |
Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
Nexperia_document_leaflet_Logic_X2SON_packages_062018 | X2SON ultra-small 4, 5, 6 & 8-pin leadless packages | Leaflet | 2018-06-05 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
VSSOP8_SOT765-1_mk | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Marcom graphics | 2017-01-28 |
XSON8_SOT1203_mk | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Marcom graphics | 2019-02-04 |
SOT765-1 | plastic, very thin shrink small outline package; 8 leads; 0.5 mm pitch; 2 mm x 2.3 mm x 1 mm body | Package information | 2022-06-03 |
SOT996-2 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 3 mm x 2 mm x 0.5 mm body | Package information | 2020-04-21 |
SOT1116 | plastic, leadless extremely thin small outline package; 8 terminals; 0.3 mm pitch; 1.2 mm x 1 mm x 0.35 mm body | Package information | 2022-06-02 |
SOT1203 | plastic, leadless extremely thin small outline package; 8 terminals; 0.35 mm pitch; 1.35 mm x 1 mm x 0.35 mm body | Package information | 2022-06-03 |
SOT833-1 | plastic, leadless extremely thin small outline package; 8 terminals; 0.5 mm pitch; 1 mm x 1.95 mm x 0.5 mm body | Package information | 2022-06-03 |
SOT1233-2 | plastic thermal enhanced extremely thin small outline package; no leads;8 terminals; body 1.35 x 0.8 x 0.32 mm | Package information | 2022-04-21 |
REFLOW_BG-BD-1 | Reflow soldering profile | Reflow soldering | 2021-04-06 |
Nexperia_Selection_guide_2023 | Nexperia Selection Guide 2023 | Selection guide | 2023-05-10 |
MAR_SOT1116 | MAR_SOT1116 Topmark | Top marking | 2013-06-03 |
MAR_SOT1203 | MAR_SOT1203 Topmark | Top marking | 2013-06-03 |
MAR_SOT833 | MAR_SOT833 Topmark | Top marking | 2013-06-03 |
支持
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模型
文件名称 | 标题 | 类型 | 日期 |
---|---|---|---|
SOT765-1 | 3D model for products with SOT765-1 package | Design support | 2020-01-22 |
SOT1116 | 3D model for products with SOT1116 package | Design support | 2023-02-02 |
SOT1203 | 3D model for products with SOT1203 package | Design support | 2023-02-02 |
SOT833-1 | 3D model for products with SOT833-1 package | Design support | 2021-01-28 |
SOT1233-2 | 3D model for products with SOT1233-2 package | Design support | 2021-01-28 |
aup1g74 | aup1g74 IBIS model | IBIS model | 2013-04-07 |
Ordering, pricing & availability
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