双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74ALVCH16501DL

18-bit universal bus transceiver; 3-state

The 74ALVCH16501 is an 18-bit universal transceiver with bus hold inputs and 3-state outputs. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CPAB is held at a HIGH or LOW logic level. If LEAB is LOW, the A-bus data is stored in the latch/flip-flop on the LOW-to-HIGH transition of CPAB. When OEAB is HIGH, the outputs are active. When OEAB is LOW, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active HIGH and OEBA is active LOW). This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been discontinued

Features and benefits

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low power dissipation

  • Direct interface with TTL levels

  • Current drive ±24 mA at VCC = 3.0 V

  • Universal bus transceiver with D-type latches and D-type flip-flops capable of operating in transparent, latched or clocked mode

  • Bus hold on all data inputs

  • Output drive capability 50 Ω transmission lines at 85 °C

  • 3-state non-inverting outputs for bus-oriented applications

  • Latch-up performance exceeds 100 mA per JESD78 Class II.A

  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C

Parametrics

Type number Package name
74ALVCH16501DL SSOP56

Package

All type numbers in the table below are discontinued.

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74ALVCH16501DL 74ALVCH16501DL,112
(935263882112)
Obsolete ALVCH16501 Standard Procedure Standard Procedure SOT371-1
SSOP56
(SOT371-1)
SOT371-1 SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE
Not available
74ALVCH16501DL,118
(935263882118)
Obsolete ALVCH16501 Standard Procedure Standard Procedure Not available

Environmental information

All type numbers in the table below are discontinued.

Type number Orderable part number Chemical content RoHS RHF-indicator
74ALVCH16501DL 74ALVCH16501DL,112 74ALVCH16501DL rohs rhf rhf
74ALVCH16501DL 74ALVCH16501DL,118 74ALVCH16501DL rohs rhf rhf
Quality and reliability disclaimer

Documentation (6)

File name Title Type Date
74ALVCH16501 18-bit universal bus transceiver; 3-state Data sheet 2024-07-01
alvch16501 alvch16501 IBIS model IBIS model 2013-04-08
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
SOT371-1 plastic, shrink small outline package; 56 leads; 0.635 mm pitch; 18.45 mm x 7.5 mm x 2.8 mm body Package information 2020-04-21
SSOP-TSSOP-VSO-REFLOW Footprint for reflow soldering Reflow soldering 2009-10-08
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

Support

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Models

File name Title Type Date
alvch16501 alvch16501 IBIS model IBIS model 2013-04-08

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.