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Click here for more information74AUP2G57GF
Low-power dual PCB configurable multiple function gate
The 74AUP2G57 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XNOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Alternatives
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10% of VCC
IOFF circuitry provides partial power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Parametrics
| Type number | Package name |
|---|---|
| 74AUP2G57GF | XSON10 |
Package
All type numbers in the table below are discontinued.
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74AUP2G57GF | 74AUP2G57GFX (935304472115) |
Withdrawn / End-of-life | aC |
XSON10 (SOT1081-2) |
SOT1081-2 | Not available |
Environmental information
All type numbers in the table below are discontinued.
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74AUP2G57GF | 74AUP2G57GFX | 74AUP2G57GF |
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Documentation (6)
| File name | Title | Type | Date |
|---|---|---|---|
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| aup2g57 | 74AUP2G57 IBIS model | IBIS model | 2015-04-02 |
| Nexperia_document_QIC_DualPCB_Configurable_Logic_201712 | Dynamically create your own combination logic device | Leaflet | 2017-12-21 |
| Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT1081-2 | plastic, leadless extremely thin small outline package; 10 terminals; 0.35 mm pitch; 1.7 mm x 1 mm x 0.5 mm body | Package information | 2020-04-21 |
Support
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Models
| File name | Title | Type | Date |
|---|---|---|---|
| aup2g57 | 74AUP2G57 IBIS model | IBIS model | 2015-04-02 |
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74AUP2G57GF
Low-power dual PCB configurable multiple function gate
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