双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74AXP4T245PW

4-bit dual supply translating transceiver; 3-state

The 74AXP4T245 is an 4-bit dual supply translating transceiver with 3-state outputs that enable bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features four 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), a output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/µs and 5.5 V/s.

Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.

Features and benefits

  • Wide supply voltage range for VCC(A) and VCC(B): 0.9 V to 5.5 V

  • Low input capacitance; CI = 1.2 pF (typical)

  • Low output capacitance; CO = 3.6 pF (typical)

  • Low dynamic power consumption; CPD = 10 pF (typical)

  • Low static power consumption; ICC = 2 μA (25 °C maximum)

  • High noise immunity

  • Complies with JEDEC standard:

    • JESD8-12 (1.1 V to 1.3 V; inputs)

    • JESD8-11 (1.4 V to 1.6 V)

    • JESD8-7 (1.65 V to 1.95 V)

    • JESD8-5 (2.3 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD12-6 (4.5 V to 5.5 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV

  • Latch-up performance exceeds 100 mA per JESD78D Class II

  • Inputs accept voltages up to 5.5 V

  • Typical data rate figures:

    • 320 Mbps when translating from 1.8 V to 3.3 V (up translation)

    • 175 Mbps when translating from 3.3 V to 1.8 V (down translation)

  • Low noise overshoot and undershoot < 10% of VCCO

  • IOFF circuitry provides partial power-down mode operation

  • Specified from -40 °C to +125 °C

Parametrics

Type number VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Package name Category
74AXP4T245PW 0.9 - 5.5 0.9 - 5.5 CMOS ± 12 9 4 ultra low -40~125 TSSOP16 Bi-directional | Direction controlled

PCB Symbol, Footprint and 3D Model

Model Name Description

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74AXP4T245PW 74AXP4T245PWJ
(935690703118)		 Active XP4T245 SOT403-1
TSSOP16
(SOT403-1) 		SOT403-1 SSOP-TSSOP-VSO-WAVE
SOT403-1_118

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74AXP4T245PW 74AXP4T245PWJ 74AXP4T245PW rohs rhf rhf
Quality and reliability disclaimer

Series

Documentation (10)

File name Title Type Date
74AXP4T245 4-bit dual supply translating transceiver; 3-state Data sheet 2020-02-06
AN90029 Pin FMEA for AXPnT family Application note 2021-07-13
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22
Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 AXP – Extremely low-power logic technology portfolio Leaflet 2019-04-05
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
TSSOP16_SOT403-1_mk plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body Marcom graphics 2017-01-28
SOT403-1 plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body Package information 2023-11-08
SOT403-1_118 TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74AXP4T245PW_Nexperia_Product_Reliability 74AXP4T245PW Nexperia Product Reliability Quality document 2024-06-16
SSOP-TSSOP-VSO-WAVE Footprint for wave soldering Wave soldering 2009-10-08

Support

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Models

File name Title Type Date
SOT403-1 3D model for products with SOT403-1 package Design support 2020-01-22

PCB Symbol, Footprint and 3D Model

Model Name Description

Ordering, pricing & availability

Type number Orderable part number Ordering code (12NC) Status Packing Packing Quantity Buy online
74AXP4T245PW 74AXP4T245PWJ 935690703118 Active SOT403-1_118 2,500 Order product

Sample

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If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples. Check out the list of official distributors.

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

Interactive datasheet

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74AXP4T245PW 74AXP4T245PWJ 935690703118 SOT403-1 Order product