Orderable parts
| Type number | Orderable part number | Ordering code (12NC) | Package | Buy from distributors |
|---|---|---|---|---|
| 74HC161D-Q100 | 74HC161D-Q100J | 935304496118 | SOT109-1 | Order product |
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Click here for more information74HC161D-Q100
Presettable synchronous 4-bit binary counter; asynchronous reset
The 74HC161-Q100 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW at the master reset input (MR) sets Q0 to Q3 LOW regardless of the levels at input pins CP, PE, CET and CEP (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascaded stage. The maximum clock frequency for the cascaded counters is determined by the CP to TC propagation delay and CEP to CP set-up time, according to the following formula:
Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V)
- JESD7A (2.0 V to 6.0 V)
CMOS input levels
Synchronous counting and loading
2 count enable inputs for n-bit cascading
Asynchronous reset
Positive-edge triggered clock
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Parametrics
| Type number | VCC (V) | Output drive capability (mA) | Logic switching levels | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|
| 74HC161D-Q100 | 2.0 - 6.0 | ± 5.2 | CMOS | 19 | 44 | low | -40~125 | SO16 |
PCB Symbol, Footprint and 3D Model
| Model Name | Description |
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Package
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74HC161D-Q100 | 74HC161D-Q100J (935304496118) |
Active | 74HC161D |
SO16 (SOT109-1) |
SOT109-1 |
SO-SOJ-REFLOW
SO-SOJ-WAVE WAVE_BG-BD-1 |
SOT109-1_118 |
Environmental information
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74HC161D-Q100 | 74HC161D-Q100J | 74HC161D-Q100 |
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Series
Documentation (13)
| File name | Title | Type | Date |
|---|---|---|---|
| 74HC161_Q100 | Presettable synchronous 4-bit binary counter; asynchronous reset | Data sheet | 2024-03-11 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| SOT109-1 | 3D model for products with SOT109-1 package | Design support | 2020-01-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SO16_SOT109-1_mk | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.35 mm body | Marcom graphics | 2017-01-28 |
| SOT109-1 | plastic, small outline package; 16 leads; 1.27 mm pitch; 9.9 mm x 3.9 mm x 1.75 mm body | Package information | 2023-11-07 |
| SOT109-1_118 | SO16; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2024-02-19 |
| 74HC161D-Q100_Nexperia_Product_Reliability | 74HC161D-Q100 Nexperia Product Reliability | Quality document | 2024-06-16 |
| SO-SOJ-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| hc | HC/HCT Spice model | SPICE model | 2022-02-17 |
| HCT_USER_GUIDE | HC/T User Guide | User manual | 1997-10-31 |
| SO-SOJ-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
| WAVE_BG-BD-1 | Wave soldering profile | Wave soldering | 2021-09-08 |
Support
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PCB Symbol, Footprint and 3D Model
| Model Name | Description |
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Ordering, pricing & availability
| Type number | Orderable part number | Ordering code (12NC) | Status | Packing | Packing Quantity | Buy online |
|---|---|---|---|---|---|---|
| 74HC161D-Q100 | 74HC161D-Q100J | 935304496118 | Active | SOT109-1_118 | 2,500 | Order product |
Sample
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74HC161D-Q100
Presettable synchronous 4-bit binary counter; asynchronous reset
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