Orderable parts
| Type number | Orderable part number | Ordering code (12NC) | Package | Buy from distributors |
|---|---|---|---|---|
| 74LVC595APW | 74LVC595APW,118 | 935282471118 | SOT403-1 | Order product |
Register once, drag and drop ECAD models into your CAD tool and speed up your design.
Click here for more information74LVC595APW
8-bit serial-in/serial-out or parallel-out shift register; 3-state
The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Overvoltage tolerant inputs to 5.5 V
CMOS low power dissipation
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Balanced propagation delays
All inputs have Schmitt-trigger action
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
Serial-to-parallel data conversion
Remote control holding register
Parametrics
| Type number | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Package name |
|---|---|---|---|---|---|---|---|---|---|
| 74LVC595APW | 1.2 - 5.5 | CMOS/LVTTL | ± 24 | 4.0 | 180 | 8 | low | -40~125 | TSSOP16 |
PCB Symbol, Footprint and 3D Model
| Model Name | Description |
|---|---|
|
|
Package
| Type number | Orderable part number, (Ordering code (12NC)) | Status | Marking | Package | Package information | Reflow-/Wave soldering | Packing |
|---|---|---|---|---|---|---|---|
| 74LVC595APW | 74LVC595APW,118 (935282471118) |
Active | LVC595A |
TSSOP16 (SOT403-1) |
SOT403-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT403-1_118 |
Environmental information
| Type number | Orderable part number | Chemical content | RoHS | RHF-indicator |
|---|---|---|---|---|
| 74LVC595APW | 74LVC595APW,118 | 74LVC595APW |
|
|
Documentation (11)
| File name | Title | Type | Date |
|---|---|---|---|
| 74LVC595A | 8-bit serial-in/serial-out or parallel-out shift register; 3-state | Data sheet | 2024-02-22 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| SOT403-1 | 3D model for products with SOT403-1 package | Design support | 2020-01-22 |
| lvc595a | 74LVC595A IBIS model | IBIS model | 2014-10-22 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP16_SOT403-1_mk | plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| SOT403-1 | plastic, thin shrink small outline package; 16 leads; 5 mm x 4.4 mm x 1.2 mm body | Package information | 2023-11-08 |
| SOT403-1_118 | TSSOP16; Reel pack for SMD, 13"; Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74LVC595APW_Nexperia_Product_Reliability | 74LVC595APW Nexperia Product Reliability | Quality document | 2024-06-16 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
Support
If you are in need of design/technical support, let us know and fill in the answer form we'll get back to you shortly.
PCB Symbol, Footprint and 3D Model
| Model Name | Description |
|---|---|
|
|
Ordering, pricing & availability
| Type number | Orderable part number | Ordering code (12NC) | Status | Packing | Packing Quantity | Buy online |
|---|---|---|---|---|---|---|
| 74LVC595APW | 74LVC595APW,118 | 935282471118 | Active | SOT403-1_118 | 2,500 | Order product |
Sample
As a Nexperia customer you can order samples via our sales organization.
If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples. Check out the list of official distributors.
How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.
74LVC595APW
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Buy from Nexperia
| SKU | Stock* | MOQ | Price per unit | Quantity |
|---|