双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVC8T245BQ-Q100

8-bit dual supply translating transceiver; 3-state

The 74LVC8T245-Q100; 74LVCH8T245-Q100 are 8-bit dual supply translating transceivers with 3-state outputs that enable bidirectional level translation. They feature two data input-output ports (pins An and Bn), a direction control input (DIR), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2 V and 5.5 V. This flexibility makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins An, OE and DIR are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIR allows transmission from An to Bn and a LOW on DIR allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated.

The devices are fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.

Active bus hold circuitry in the 74LVCH8T245-Q100 holds unused or floating data inputs at a valid logic level.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

  • Wide supply voltage range:

    • VCC(A): 1.2 V to 5.5 V

    • VCC(B): 1.2 V to 5.5 V

  • High noise immunity

  • Complies with JEDEC standards:

    • JESD8-7 (1.2 V to 1.95 V)

    • JESD8-5 (1.8 V to 2.7 V)

    • JESD8C (2.7 V to 3.6 V)

    • JESD36 (4.5 V to 5.5 V)

  • Maximum data rates:

    • 420 Mbps (3.3 V to 5.0 V translation)

    • 210 Mbps (translate to 3.3 V))

    • 140 Mbps (translate to 2.5 V)

    • 75 Mbps (translate to 1.8 V)

    • 60 Mbps (translate to 1.5 V)

  • Suspend mode

  • Latch-up performance exceeds 100 mA per JESD 78B Class II

  • ±24 mA output drive (VCC = 3.0 V)

  • Inputs accept voltages up to 5.5 V

  • Low power consumption: 30 μA maximum ICC

  • IOFF circuitry provides partial Power-down mode operation

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

Parametrics

Type number VCC(A) (V) VCC(B) (V) Logic switching levels Output drive capability (mA) tpd (ns) Nr of bits Power dissipation considerations Tamb (°C) Package name
74LVC8T245BQ-Q100 1.2 - 5.5 1.2 - 5.5 CMOS/LVTTL ± 24 3.5 8 low -40~125 DHVQFN24

PCB Symbol, Footprint and 3D Model

Model Name Description

Package

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74LVC8T245BQ-Q100 74LVC8T245BQ-Q100J
(935301104118)		 Active LVC8T245 SOT815-1
DHVQFN24
(SOT815-1) 		SOT815-1 SOT815-1_118

Environmental information

Type number Orderable part number Chemical content RoHS RHF-indicator
74LVC8T245BQ-Q100 74LVC8T245BQ-Q100J 74LVC8T245BQ-Q100 rohs rhf rhf
Quality and reliability disclaimer

Series

Documentation (9)

File name Title Type Date
74LVC_LVCH8T245_Q100 8-bit dual supply translating transceiver; 3-state Data sheet 2023-08-10
AN11009 Pin FMEA for LVC family Application note 2019-01-09
SOT815-1 3D model for products with SOT815-1 package Design support 2019-10-03
lvc8t245 74LVC8T245 IBIS model IBIS model 2021-02-02
Nexperia_package_poster Nexperia package poster Leaflet 2020-05-15
DHVQFN24_SOT815-1_mk plastic, dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 3.5 mm x 5.5 mm x 0.85 mm body Marcom graphics 2017-01-28
SOT815-1 plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 24 terminals; 0.5 mm pitch; 5.5 mm x 3.5 mm x 1 mm body Package information 2021-08-17
SOT815-1_118 DHVQFN24; Reel pack for SMD, 13"; Q1/T1 product orientation Packing information 2020-04-21
74LVC8T245BQ-Q100_Nexperia_Product_Reliability 74LVC8T245BQ-Q100 Nexperia Product Reliability Quality document 2024-06-16

Support

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Models

File name Title Type Date
lvc8t245 74LVC8T245 IBIS model IBIS model 2021-02-02
SOT815-1 3D model for products with SOT815-1 package Design support 2019-10-03

PCB Symbol, Footprint and 3D Model

Model Name Description

Ordering, pricing & availability

Type number Orderable part number Ordering code (12NC) Status Packing Packing Quantity Buy online
74LVC8T245BQ-Q100 74LVC8T245BQ-Q100J 935301104118 Active SOT815-1_118 3,000 Order product

Sample

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If you do not have a direct account with Nexperia our network of global and regional distributors is available and equipped to support you with Nexperia samples. Check out the list of official distributors.

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.

Interactive datasheet

Orderable parts

Type number Orderable part number Ordering code (12NC) Package Buy from distributors
74LVC8T245BQ-Q100 74LVC8T245BQ-Q100J 935301104118 SOT815-1 Order product