双极性晶体管

二极管

ESD保护、TVS、滤波和信号调节ESD保护

MOSFET

氮化镓场效应晶体管(GaN FET)

绝缘栅双极晶体管(IGBTs)

模拟和逻辑IC

汽车应用认证产品(AEC-Q100/Q101)

74LVCH16374ABX

16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state

The 74LVC16374A; 74LVCH16374A is a 16-bit edge-triggered D-type flip-flop with 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been discontinued

Features and benefits

  • Overvoltage tolerant inputs to 5.5 V

  • Wide supply voltage range from 1.2 V to 3.6 V

  • CMOS low power dissipation

  • Multibyte flow-through standard pinout architecture

  • Low inductance multiple supply pins for minimum noise and ground bounce

  • Direct interface with TTL levels

  • All data inputs have bus hold (74LVCH16374A only)

  • High-impedance outputs when VCC = 0 V

  • IOFF circuitry provides partial Power-down mode operation

  • Complies with JEDEC standard:

    • JESD8-7A (1.65 V to 1.95 V)

    • JESD8-5A (2.3 V to 2.7 V)

    • JESD8-C/JESD36 (2.7 V to 3.6 V)

  • ESD protection:

    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Parametrics

Type number Package name
74LVCH16374ABX HXQFN60U

Package

All type numbers in the table below are discontinued.

Type number Orderable part number, (Ordering code (12NC)) Status Marking Package Package information Reflow-/Wave soldering Packing
74LVCH16374ABX 74LVCH16374ABX,518
(935295875518)
Obsolete LVCH16374A Standard Procedure Standard Procedure no package information

Environmental information

All type numbers in the table below are discontinued.

Type number Orderable part number Chemical content RoHS RHF-indicator
74LVCH16374ABX 74LVCH16374ABX,518 74LVCH16374ABX rohs rhf rhf
Quality and reliability disclaimer

Documentation (2)

File name Title Type Date
74LVC_LVCH16374A 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state Data sheet 2024-04-22
lvch16374a lvch16374a IBIS model IBIS model 2013-04-09

Support

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Models

File name Title Type Date
lvch16374a lvch16374a IBIS model IBIS model 2013-04-09

How does it work?

The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.